ML4894
PIN CONFIGURATION
ML4894
8-Pin SOIC (S08)
VREG
VFB
ISENSE
SHDN
1
2
3
4
TOP VIEW
8
7
6
5
VIN
P DRV
N DRV
GND
PIN DESCRIPTION
PIN# NAME
FUNCTION
PIN# NAME
FUNCTION
1
2
3
4
V
REG
V
FB
I
SENSE
SHDN
Connection point for internal linear
regulator bypass capacitor
Voltage feedback pin for regulating
the 5V output
Current sense input
a logic low on this pin shuts down the
regulator and all internal bias
circuitry for minimum power
consumption
5
6
7
8
GND
N DRV
P DRV
V
IN
Analog signal ground
NMOS driver output
PMOS driver output
Battery input voltage
2