ML4805
FUNCTIONAL DESCRIPTION (Continued)
18
1
15
POWER FACTOR CORRECTOR
2.75V
V
CC
IEAO
VEAO
VEA
OVP
+
V
V
REF
FB
7.5V
-
IEA
16
14
1.6kΩ
17
-
REFERENCE
+
–
2.5V
AC
+
PFC
PFC I
I
LIMIT
CONTROLLER
2
4
3
8
-1V
+
-
8V
GAIN
MODULATOR
V
I
RMS
PFC OUT
PFC
OUTPUT
DRIVER
1.6kΩ
SENSE
RAMP 1
OSCILLATOR
÷2
R C
T
T
7
DUTY CYCLE
LIMIT
Figure 1. PFC Section Block Diagram
2
inversely proportional to V
(except at unusually
Current Error Amplifier
RMS
low values of V
where special gain contouring
RMS
takes over to limit power dissipation of the circuit
components under heavy brownout conditions). The
relationship between V
and gain is designated as K.
RMS
3) The output of the voltage error amplifier, VEAO. The
gain modulator responds linearly to variations in this
voltage.
voltage on I
represents the sum of all currents
SENSE
The output of the gain modulator is a current signal, in the
form of a full wave rectified sinusoid at twice the line
frequency. This current is applied to the virtual-ground
(negative) input of the current error amplifier. In this way
the gain modulator forms the reference for the current
error loop, and ultimately controls the instantaneous
current draw of the PFC from the power line. The general
form for the output of the gain modulator is:
flowing in the PFC circuit, and is typically derived from a
current sense resistor in series with the negative terminal
of the input bridge rectifier. In higher power applications,
two current transformers are sometimes used, one to
monitor the I of the boost MOSFET(s) and one to monitor
D
the I of the boost diode. As stated above, the inverting
F
input of the current error amplifier is a virtual ground.
Given this fact, and the arrangement of the duty cycle
modulator polarities internal to the PFC, an increase in
positive current from the gain modulator will cause the
output stage to increase its duty cycle until the voltage on
IAC ´ VEAO
IGAINMOD
=
´ 1V
2
VRMS
I
is adequately negative to cancel this increased
SENSE
current. Similarly, if the gain modulator’s output
decreases, the output duty cycle will decrease to achieve
More exactly, the output current of the gain modulator is
given by:
a less negative voltage on the I
pin.
SENSE
Cycle-By-Cycle Current Limiter
The I pin, as well as being a part of the current
(1)
IGAINMOD =K ×(VEAO −0.625V) ×IAC
-1
where K is in units of V .
SENSE
feedback loop, is a direct input to the cycle-by-cycle
current limiter for the PFC section. Should the input
voltage at this pin ever be more negative than -1V, the
output of the PFC will be disabled until the protection
flip-flop is reset by the clock pulse at the start of the next
PFC power cycle.
Note that the output current of the gain modulator is
limited to 500µA.
7