ML4803
TYPICAL APPLICATIONS
(Continued)
R
COMP
=
R
COMP
=
C
ZERO
=
1
2
´ p ´
f
´
C
COMP
1
=
330k
W
6.28
´
30Hz
´
16nF
1
2
´ p ´
f
´
R
COMP
10
(3)
to develop the internal ramp by charging the internal
30pF +12/–10% capacitor. See Figures 10 and 11. The
frequency of the internal programming ramp is set
internally to 67kHz.
PFC CURRENT SENSE FILTERING
(4)
C
ZERO
=
1
=
0.16
m
F
6.28
´
3Hz
´
330k
W
INTERNAL VOLTAGE RAMP
The internal ramp current source is programmed by way of
the VEAO pin voltage. Figure 7 displays the internal ramp
current vs. the VEAO voltage. This current source is used
In DCM, the input current wave shaping technique used
by the ML4803 could cause the input current to run away.
In order for this technique to be able to operate properly
under DCM, the programming ramp must meet the boost
inductor current down-slope at zero amps. Assuming the
programming ramp is zero under light load, the OFF-time
will be terminated once the inductor current reaches zero.
Subsequently the PFC gate drive is initiated, eliminating
the necessary dead time needed for the DCM mode. This
forces the output to run away until the V
CC
OVP shuts
down the PFC. This situation is corrected by adding an
60
Power Stage
Overall Gain
Compensation
Network Gain
40
VO
GAIN (dB)
20
11.3MΩ
ML4803
IOUT
220µF
RLOAD
667Ω
VEAO
330kΩ
15nF
–
0.15µF
POWER
STAGE
COMPENSATION
ML4803
IVEAO
35µA
0
–20
∆V
EAO +
–40
–60
0.1
1
10
FREQUENCY (Hz)
100
1000
Figure 4. Voltage Control Loop
0
50
Figure 5. Voltage Loop Gain
Power Stage
Overall
Compensation
Network
FF @ –55ºC
40
TYP @ –55ºC
TYP @ ROOM TEMP
50
IRAMP (µA)
PHASE (º)
30
TYP @ 155ºC
SS @ 155ºC
100
20
150
10
200
0.1
0
1
10
FREQUENCY (Hz)
100
1000
0
1
2
3
4
5
6
7
VEAO (V)
Figure 6. Voltage Loop Phase
8
Figure 7. Internal Ramp Current vs. V
EAO
February 1999
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
