ML2280, ML2283
ML2280 Timing
1
2
t
3
4
5
6
7
8
9
10
11
CLOCK (CLK)
SET-UP
CHIP SELECT (CS)
t
C
DATA OUT (DO)
SAMPLE & HOLD
*
HI-Z
HI-Z
7
6
5
4
3
2
1
0
(MSB)
(LSB)
ACQUISITION (t
)
ACQ
*LSB FIRST OUTPUT NOT AVAILABLE ON ML2280
ML2283 Timing
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
CLOCK (CLK)
CHIP SELECT (CS)
DATA IN (DI)
t
OUTPUT DATA
SET-UP
ADDRESS MUX
START
SELECT
BIT 0
ODD/SIGN
BIT
DON’T CARE (DI DISABLED UNTIL NEXT CONVERSION
SGL/DIF
SELECT
BIT 1
A/D CONVERSION IN PROCESS
SAR STATUS (SARS)
DATA OUT (DO)
HI-Z
HI-Z
HI-Z
MSB FIRST DATA
LSB FIRST DATA
HI-Z
SAMPLE & HOLD
7
6
5
4
3
2
1
0
1
2
3
4
5
6
7
(MSB)
ACQUISITION (t
)
ACQ
Figure 2. Timing Diagrams (Continued)
7