ML2281, ML2282, ML2284, ML2288
ML2281 Timing
1
CLOCK (CLK)
t
SET-UP
CHIP SELECT (CS)
t
C
DATA OUT (DO)
SAMPLE & HOLD
ACQUISITION (t
ACQ
)
HI-Z
7
(MSB)
6
5
4
3
2
1
0
(LSB)
*
HI-Z
2
3
4
5
6
7
8
9
10
11
*LSB FIRST OUTPUT NOT AVAILABLE ON ML2281
ML2282 Timing
1
CLOCK (CLK)
t
SET-UP
CHIP SELECT (CS)
ADDRESS MUX
START
BIT
DATA IN (DI)
SGL/DIF
DATA OUT (DO)
ODD/
SIGN
DON’T CARE (DI DISABLED UNTIL NEXT CONVERSION CYCLE)
MSB FIRST DATA
LSB FIRST DATA
HI-Z
7
(MSB)
6
5
4
3
2
1
0
(LSB)
1
2
3
4
5
6
7
(MSB)
OUTPUT DATA
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
HI-Z
SAMPLE & HOLD
ACQUISITION (t
ACQ
)
ML2284 Timing
1
CLOCK (CLK)
t
SET-UP
CHIP SELECT (CS)
ADDRESS MUX
START
BIT ODD/SIGN
DATA IN (DI)
SGL/DIF SELECT
BIT 1
SAR STATUS (SARS)
HI-Z
MSB FIRST DATA
DATA OUT (DO)
HI-Z
7
6
(MSB)
5
4
3
2
1
0
(LSB)
1
2
3
4
5
6
7
(MSB)
LSB FIRST DATA
HI-Z
DON’T CARE (DI DISABLED UNTIL NEXT CONVERSION CYCLE)
A/D CONVERSION IN PROCESS
HI-Z
OUTPUT DATA
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SAMPLE & HOLD
ACQUISITION (t
ACQ
)
Figure 2. Timing Diagrams (Continued)
8
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
