ML2281, ML2282, ML2284, ML2288
DI*
CS
17
18
R
START
R
R
R
5-BIT SHIFT-REGISTER
ODD/
SGL/DIF
SELECT 1
SIGN
R
SELECT 0
D
CS
C
START
CLK
16
V
CC
1
2
3
4
5
6
7
8
9
COMP
12
TO INTERNAL
CIRCUITRY
INPUT V
CC
13
TO
16
INTERNAL
17
CIRCUITS
18
R
LADDER
AND
DECODER
C
R
B7
B6
B5
SAR
LOGIC
AND
LATCH
B4
B3
B2
B1
B0
COMP
EOC
9-BIT
SHIFT
REGISTER
R
C
CS
CS
EOC
C
R
D
ANALOG
MUX
(EQUIVALENT)
C
+
–
13
MUX
ADDRESS
NOTE 1
+
–
NOTE 1
SE*
CS
SARS*
15
T
D
TIME
DELAY
C
Q
D
C
D
C
R
D
Q
R
Q
R
CS
DEOC
CS
DSTART 1
CS
CH0*
CH1*
CH2
CH3
CH4*
CH5*
CH6*
CH7*
COM*
Σ
DSTART 2
CS
Q
14
DO
V
REF
V
CC
V+*
DGND*
20
7V SHUNT
REGULATOR
AGND*
INPUT PROTECTION—ALL LOGIC INPUTS
LSB FIRST
MSB FIRST
PARALLEL XFR
TO SHIFT REGISTER
*SOME OF THESE FUNCTIONS/PINS ARE NOT AVAILABLE WITH OTHER OPTIONS.
NOTE 1: FOR THE ML2284 DI IS INPUT DIRECTLY TO THE D INPUT OF SELECT 1. SELECT 0 IS FORCED TO A “1”. FOR THE ML2282, DI IS INPUT DIRECTLY TO THE D
INPUT OF ODD/SIGN. SELECT 0 IS FORCED TO A “1” AND SELECT 1 IS FORCED TO A “0”.
Figure 6. ML2288 Functional Block Diagram
11
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
