欢迎访问ic37.com |
会员登录 免费注册
发布采购

WEDPN16M64V-125B2M 参数 Datasheet PDF下载

WEDPN16M64V-125B2M图片预览
型号: WEDPN16M64V-125B2M
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 16MX64, 6ns, CMOS, PBGA219, 21 X 21 MM, PLASTIC, BGA-219]
分类和应用: 动态存储器内存集成电路
文件页数/大小: 13 页 / 916 K
品牌: MERCURY [ MERCURY UNITED ELECTRONICS INC ]
 浏览型号WEDPN16M64V-125B2M的Datasheet PDF文件第5页浏览型号WEDPN16M64V-125B2M的Datasheet PDF文件第6页浏览型号WEDPN16M64V-125B2M的Datasheet PDF文件第7页浏览型号WEDPN16M64V-125B2M的Datasheet PDF文件第8页浏览型号WEDPN16M64V-125B2M的Datasheet PDF文件第10页浏览型号WEDPN16M64V-125B2M的Datasheet PDF文件第11页浏览型号WEDPN16M64V-125B2M的Datasheet PDF文件第12页浏览型号WEDPN16M64V-125B2M的Datasheet PDF文件第13页  
WEDPN16M64V-XB2X  
PRELIMINARY  
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CHARACTERISTICS  
(NOTES 5, 6, 8, 9, 11)  
-100  
-125  
-133  
Parameter  
Symbol  
Min  
Unit  
Max  
7
Min  
Max  
6
Min  
Max  
5.5  
6
CL = 3  
CL = 2  
t
t
AC (3)  
AC (2)  
tAH  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ms  
ms  
ns  
ns  
ns  
ns  
Access time from CLK (pos. edge) (28)  
7
6
Address hold time  
Address setup time  
CLK high-level width  
CLK low-level width  
1
2
1
2
0.8  
1.5  
2.5  
2.5  
7.5  
10  
tAS  
tCH  
3
3
tCL  
3
3
CL = 3  
CL = 2  
tCK (3)  
tCK (2)  
tCKH  
tCKS  
10  
13  
1
8
Clock cycle time (22)  
10  
1
CKE hold time  
0.8  
1.5  
0.8  
1.5  
0.8  
1.5  
CKE setup time (30)  
2
2
CS#, RAS#, CAS#, WE#, DQM hold time  
CS#, RAS#, CAS#, WE#, DQM setup time  
Data-in hold time  
tCMH  
tCMS  
tDH  
1
1
2
2
1
1
Data-in setup time  
tDS  
2
2
CL = 3 (10)  
CL = 2 (10)  
tHZ (3)  
tHZ (2)  
tLZ  
7
7
6
6
5.5  
6
Data-out high-impedance time (10)  
Data-out low-impedance time  
1
3
1
3
1
3
Data-out hold time (load)  
tOH  
Data-out hold time (no load) (29)  
ACTIVE to PRECHARGE command  
ACTIVE to ACTIVE command period  
ACTIVE to READ or WRITE delay  
Refresh period (8,192 rows) – Commercial, Industrial  
Refresh period (8,192 rows) – Military  
AUTO REFRESH period  
tOH  
1.8  
50  
70  
20  
1.8  
50  
68  
20  
1.8  
50  
68  
20  
N
tRAS  
tRC  
120,000  
120,000  
120,000  
tRCD  
tREF  
tREF  
tRFC  
tRP  
64  
16  
64  
16  
64  
16  
70  
20  
20  
0.3  
70  
20  
20  
0.3  
70  
20  
20  
0.3  
PRECHARGE command period  
ACTIVE bank A to ACTIVE bank B command  
Transition time (7)  
tRRD  
tT  
1.2  
1.2  
1.2  
1 CLK +  
7ns  
1 CLK +  
7ns  
1 CLK +  
7.5ns  
(23)  
(24)  
WRITE recovery time  
tWR  
15  
80  
15  
80  
15  
75  
ns  
ns  
Exit SELF REFRESH to ACTIVE command (20)  
tXSR  
Microsemi Corporation reserves the right to change products or specications without notice.  
July 2011 © 2011 Microsemi Corporation. All rights reserved.  
Rev. 1  
9
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp