WE512K / 256K / 128K8-XCX
READ
Figure 5 shows Read cycle waveforms. A read cycle begins with
selection address, chip select and output enable. Chip select is
accomplished by placing the CS# line low. Output enable is done
by placing the OE# line low. The memory places the selected data
byte on I/O0 through I/O7 after the access time. The output of the
memory is placed in a high impedance state shortly after either the
OE# line or CS# line is returned to a high level.
FIGURE 5 – READ WAVEFORMS
ADDRESS
CS#
OE#
OUTPUT
NOTE:
OE# may be delayed up to tACS-tOE
after the falling edge of CS# without
impact on tOE or by tACC-tOE after an
address change without impact on tACC.
AC READ CHARACTERISTICS (See Figure 5)
FOR WE512K8-XCX
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
-150
-200
-250
-300
Parameter
Symbol
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
trc
tacc
tacs
toh
toe
tdf
150
200
250
300
ns
ns
ns
ns
ns
ns
Address Access Time
Chip Select Access Time
150
150
200
200
250
250
300
300
Output Hold from Address Change, OE# or CS#
Output Enable to Output Valid
0
0
0
0
85
70
85
70
100
70
125
70
Chip Select or Output Enable to High Z Output
FOR WE256K8-XCX and WE128K8-XCX
-150
-200
Parameter
Symbol
Unit
Min
Max
Min
Max
Read Cycle Time
trc
tacc
tacs
toh
toe
tdf
150
200
ns
ns
ns
ns
ns
ns
Address Access Time
150
150
200
200
Chip Select Access Time
Output Hold from Address Change, OE# or CS#
Output Enable to Output Valid
Chip Select or Output Enable to High Z Output
0
0
85
70
85
70
5
4312.08E-0718-ss-WE512K_256K_128K8-XCX
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com
MERCURY [ MERCURY UNITED ELECTRONICS INC ]
