Differential LVPECL Crystal Clock Oscillators
HPK5761 Series 200 fsec Jitter +2.5V +3.3V “K” Family
MERCURY
Since 1973
Absolute Maximum Rating Permanent damage may be created if operate beyond limits specified Ta=25°C, Vss=0V
Rating
Parameters
Min.
Vss-0.5V
Vss-0.5V
Vss-0.5V
Max.
5.0V
VDD+0.5V
VDD+0.5V
Supply Voltage
Input Voltage
Output Voltage
Environmental Performance Specifications
Green Requirement
MSL Level
Storage temp. range
Humidity
Hermetic seal
Solderability
RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) compliant
Level 1 per IPC/JEDEC J-STD-020D.1
-55°C to +125°C
85% RH, 85°C, 48 hours
Leak rate 2x10-8 ATM-cm3/sec max.
MIL-STD-202F method 208E
Reflow
Vibration
Shock
ESD Protection
Contact pad surface finish
Weight per unit
260°C for 10 sec max.. 2 times max.
MIL-STD-202F method 204, 35G, 50 to 2000 Hz
MIL-STD-202F method 213B, test condi. E, 1000GG ½ sine wave
2KV max. Human body model.
Gold (0.3~1.0 um) on nickel (1.27~8.89 um)
180 mg typical
Part Number Format and Examples:
Example: 3HPK5761-A-155.520; 25HPK5761-A-155.520
Explanation: +3.3V HPK5761 series LVPECL output clock oscillator, frequency stability is ±25 ppm over
-10°C to +70°C, 155.520 MHz
: customer to specify
A
155.520
3
HPK5761
—
—
: VDD voltage codes: “3” for +3.3 V; “25” for +2.5 V : HPK5761 product series. „H” for clock; “P” for PECL; “K”:
for “K” family characteristics.“576” for 5x7 mm SMD with 6 pads. „1” for Tri-State on pad 1.
: Frequency stability code: “A” ~ “F” or custom. See table above. : Frequency in MHz
25HPK5761 and 3HPK5761 Test Circuit and Waveform:
+VDD
VDD
R1,R3 R2,R4
PECL
+3.3V 127
+2.5V 250
82.5
62.5
+VDD
PECL
Duty Cycle
45% ~ 55%
Duty Cycle
45% ~ 55%
PECL
Supply
Voltage
6
5
4
80%
A
HPK5761
M E C
50%
20%
+
-
+
V
2
1
3
0.1uF
-
PECL
Top view
Tr
Tf
MERCURY
Page 2 of 4
Date: Nov. 1, 2012
Rev. 1