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MG87FXY051AS20 参数 Datasheet PDF下载

MG87FXY051AS20图片预览
型号: MG87FXY051AS20
PDF下载: 下载PDF文件 查看货源
内容描述: 8位microcontroll [8-bits microcontroll]
分类和应用:
文件页数/大小: 56 页 / 854 K
品牌: MEGAWIN [ MEGAWIN TECHNOLOGY CO., LTD ]
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MG87FE/L2051/4051/6051  
MEGAWIN  
Preliminary, v 1.03  
MAKE YOU WIN  
Bit 7: OSCDR, OSC Driving control Register. Default value is load from OR1.b4 inverted value. And it could be  
read/written by CPU.  
0: The driving of crystal oscillator is enough for oscillation up to 48MHz.  
1: The driving of crystal oscillator is reduced. It will helpful in EMI reduction. Regarding application not needing  
high frequency clock, it is recommended to do so.  
Bit 6: EN6TR, Enable 6T mode control register. Default value is load from OR1.b0 inverted value. And it could be  
read/written by CPU. The access on this bit will affect CKCON3.EN6TR to corresponding operation and  
get same control function.  
0: MG87FE/L2051/4051/6051 will run in 12T mode.  
1: MG87FE/L2051/4051/6051 will run in 6T mode.  
Bit 5~0: This is set the crystal frequency value to define the time base of ISP/IAP programming. Fill with a proper  
value according to OSCin, as listed below.  
[XCKS5~XCKS0] = OSCin – 1, where OSCin=1~48 (MHz) in 12T mode.  
[XCKS5~XCKS0] = OSCinX2 – 1, where OSCin=0.5~24 (MHz) in 6T mode.  
For a 12T examples,  
(1) If OSCin=12MHz, then fill [XCKS4~XCKS0] with 11, i.e., 001011B.  
(2) If OSCin=6MHz, then fill [XCKS4~XCKS0] with 5, i.e., 000101B.  
OSCin @ 12T  
1MHz  
OSCin @ 6T  
0.5MHz  
1MHz  
XCKS Setting  
6’b000000  
6’b000001  
6’b000010  
6’b000011  
……  
2MHz  
3MHz  
4MHz  
……  
1.5MHz  
2MHz  
……  
45MHz  
46MHz  
47MHz  
48MHz  
22.5MHz  
23MHz  
23.5MHz  
24MHz  
6’b101100  
6’b101101  
6’b101110  
6’b101111  
The default value of XCKS= 6’b001010 for OSCin= 11MHz at 12T mode.  
CKCON3: Clock Control Register 3  
Address=8FH, read/write, por+RESET=xxxx-xx0x  
7
-
6
-
5
-
4
-
3
-
2
-
1
0
PWDEX  
EN6TR  
Bit 7~2: Reserved.  
Bit 1: PWDEX, Power-down Exit Mode.  
0: wake up from Power-down is internally timed.  
1: wake up from Power-down is externally controlled.  
Bit 0: EN6TR, Enable 6T mode control register. Default value is load from OR1.b0 inverted value. And it could be  
read/written by CPU. The access on this bit will affect CKCON2.EN6TR to corresponding operation and  
get same control function.  
0: MG87FE/L2051/4051/6051 will run in 12T mode.  
1: MG87FE/L2051/4051/6051 will run in 6T mode.  
This document information is the intellectual property of Megawin Technology.  
© Megawin Technology Co., Ltd. 2009 All rights reserved.  
QP-7300-03D  
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