MG87FE/L2051/4051/6051
MAKE YOU WIN
Preliminary Ver 1.00
16. System Clock
16.1. Clock Structure
16.2. Clock Register
CKCON: Clock Control Register
Address=C7H, read/write, RESET=xxxx-x000
7
-
6
-
5
-
4
-
3
-
2
1
0
SCKS2
SCKS1
SCKS0
Bit 7~3: Reserved.
Bit 2~0: SCKS2 ~ SCKS0, programmable System Clock Selection.
SCKS[2:0] System Clock (FSYSCLK
)
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
CLKin
CLKin /2
CLKin /4
CLKin /8
CLKin /16
CLKin /32
CLKin /64
CLKin /128
CKCON2: Clock Control Register 2
Address=BFH, read/write, RESET=xx00-1010
7
6
5
4
3
2
1
0
OSCDR
EN6TR
XCKS5
XCKS4
XCKS3
XCKS2
XCKS1
XCKS0
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
QP-7300-03D
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