MG87FE/L2051/4051/6051
Preliminary, v 1.03
MAKE YOU WIN
mode1, if SM2=1 then RI will not be set unless a valid stop Bit was received, and the received byte is a Given
or Broadcast address. In Mode 0, SM2 should be 0.
Bit 4: REN, Enable serial reception.
0: Clear by software to disable reception.
1: Set by software to enable reception.
Bit 3: TB8, The 9th data bit that will be transmitted in Modes 2 and 3. Set or clear by software as desired.
Bit 2: RB8, In Modes 2 and 3, the 9th data bit that was received. In Mode 1, if SM2 = 0, RB8 is the stop bit that
was received. In Mode 0, RB8 is not used.
Bit 1: TI. Transmit interrupt flag.
0: Must be cleared by software.
1: Set by hardware at the end of the 8th bit time in Mode 0, or at the beginning of the stop bit in the other modes,
in any serial transmission.
Bit 0: RI. Receive interrupt flag.
0: Must be cleared by software.
1: Set by hardware at the end of the 8th bit time in Mode 0, or halfway through the stop bit time in the other modes,
in any serial reception (except see SM2).
SBUF: Serial Buffer Register
Address=99H, read/write, Power On + RESET=XXXX-XXXX
7
6
5
4
3
2
1
0
Bit 7~0: It is used as the buffer register in transmission and reception.
SADDR: Slave Address Register
Address=A9H, read/write, Power On + RESET=0000-0000
7
6
5
4
3
2
2
1
1
0
0
SCON: Slave Address Mask Register
Address=B9H, read/write, Power On + RESET=0000-0000
7
6
5
4
3
SADDR register is combined with SADEN register to form Given/Broadcast Address for automatic address
recognition. In fact, SADEN functions as the “mask” register for SADDR register. The following is the example for
it.
SADDR
SADEN
Given
=
=
=
1100 0000
1111 1101
1100 00x0
The Given slave address will be checked except
bit 1 is treated as “don’t care”
The Broadcast Address for each slave is created by taking the logical OR of SADDR and SADEN. Zero in this
result is considered as “don’t care”. Upon reset, SADDR and SADEN are loaded with all 0s. This produces a
Given Address of all “don’t care” and a Broadcast Address of all “don’t care”. This disables the automatic address
detection feature.
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
QP-7300-03D
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