Megawin Technology Co., Ltd.
MG87FE/L52
8.2 Timer0/T0 & Timer1/T1
Mode 0
The timer register is configured as a 13-bits register. As when the count rolls over from all 1s to
all 0s, it sets the timer interrupt flag TFx. The counted input is enabled to the timer when TRx = 1
and either GATE=0 or INTx = 1. Mode 0 operation is the same for Timer0 and Timer1.
Mode 1
Mode1 is the same as Mode0, except that the timer register is being run with all 16 bits.
Mode 2
Mode 2 configures the timer register as an 8-bits counter (TLx) with automatic reload. Overflow
from TLx does not only set TFx, but also reloads TLx with the content of THx, which is
determined by user’s program. The reload leaves THx unchanged. Mode 2 operation is the
same for Timer0 and Timer1.
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Preliminary ver 1.3
Date: 2009-JAN-20
MEGAWIN [ MEGAWIN TECHNOLOGY CO., LTD ]
