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MG87FL52GF 参数 Datasheet PDF下载

MG87FL52GF图片预览
型号: MG87FL52GF
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8 bits microcontroller]
分类和应用: 微控制器
文件页数/大小: 44 页 / 857 K
品牌: MEGAWIN [ MEGAWIN TECHNOLOGY CO., LTD ]
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Megawin Technology Co., Ltd.  
MG87FE/L52  
There are two extra SFR designed to configure timer T2. They are T2MOD, and T2CON.  
T2MOD  
Name  
Bit7  
-
Bit6  
-
Bit5  
-
Bit4  
-
Bit3  
-
Bit2  
-
Bit1  
Bit0  
T2MOD  
T2OE  
DCEN  
T2OE  
DCEN  
Timer-2 output enable bit. It enables Timer2 overflow rate to toggle P1.0  
Down Count Enable bit. When set, this will allow Timer2 to be configured as a  
down counter.  
T2CON  
Name  
Bit7  
TF2  
Bit6  
Bit5  
Bit4  
Bit3  
Bit2  
TR2  
Bit1  
Bit0  
T2CON  
EXF2  
RCLK  
TCLK  
EXEN2  
C//T2  
CP/RL2  
Timer2 overflow flag. It will be set by Timer2 overflow and must be cleared by  
software. TF2 will not be set when either TCLK or RCLK =1.  
Timer2 external flag. It will be set when either a capture or reload is caused by a  
negative transition on pin T2EX and EXEN2=1. When Timer2 interrupt is enabled,  
EXF2=1 will cause the CPU vector to the Timer2 interrupt routine. EXF2 must be  
cleared by software. EXF2 does not cause an interrupt in Auto-Reload Up-Down  
mode (ARUD).  
TF2  
EXF2  
When this bit was set and will cause the serial port to use Timer2 overflow pulse  
for its receive-clock in mode-1 and mode-3. RCLK=0 will cause Timer1 overflow  
pulse to be used.  
RCLK  
TCLK  
When this bit was set and will cause the serial port to use Timer2 overflow pulse  
for its transmit-clock in mode-1 and mode-3. TCLK=0 will cause Timer1 overflow  
pulse to be used.  
Timer-2 external enable flag. When set, allows a capture or reload to be occurred.  
As a result of a negative transition on T2EX, if Timer2 is not used to clock the  
serial port. EXEN2=0 will cause Timer2 to ignore events at T2EX.  
Start/Stop control bit for Timer2.  
EXEN2  
TR2  
C//T2  
=0, will set as Timer function; =1, will set as external event counter.  
Capture/Reload flag. When set, captures will occurs on a negative transition at  
T2EX if EXEN2=1. When cleared, auto-reload function will occur either with  
Timer2 overflows or a negative transition at T2EX when EXEN2=1. When whether  
TCLK or RCLK is 1, this bit is ignored and the timer is forced to auto-reload on  
Timer2 overflow.  
CP/RL2  
17  
Preliminary ver 1.3  
Date: 2009-JAN-20  
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