MX29LV800C T/B
AUTOMATIC SECTOR ERASE TIMING WAVEFORM
Sector indicated by A12 to A18 are erased. External
erase verify is not required because data are verified
automatically by internal control circuit. Erasure comple-
tion can be verified by DATA# polling and toggle bit check-
ing after automatic erase starts. Device outputs 0 dur-
ing erasure and 1 after erasure on Q7. (Q6 is for toggle
bit; see toggle bit, DATA# polling, timing waveform)
FIGURE 8.AUTOMATIC SECTOR ERASETIMINGWAVEFORM
Erase Command Sequence(last two cycle)
Read Status Data
VA
tWC
tAS
Sector
Sector
Sector
VA
2AAh
Address
CE#
Address 0
Address 1
Address n
tAH
tCH
tGHWL
OE#
WE#
tWHWH2
tBAL
tWP
tCS
tWPH
tDS tDH
In
Progress
55h
30h
30h
30h
Complete
Data
tBUSY
tRB
RY/BY#
tVCS
VCC
NOTES:
SA=sector address(for Sector Erase), VA=Valid Address for reading status data(see "Write Operation Status").
P/N:PM1183
REV. 1.4, APR. 24, 2006
35
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