MX29LV320AT/B
The primary method requires VID on the RESET only.
This method can be implemented either in-system or via
programming equipment. This method uses standard
microprocessor bus cycle timing. Refer to Figure 13 for
timing diagram and Figure 14 illustrates the algorithm for
the sector group protection operation.
OUTPUT DISABLE
With the OE input at a logic high level (VIH), output from
the devices are disabled.This will cause the output pins
to be in a high impedance state.
The alternate method intended only for programming
equipment, must force VID on address pin A9 and con-
trol pin OE, (suggest VID = 12V) A6 = VIL and CE =
VIL(seeTable 2). Programming of the protection circuitry
begins on the falling edge of the WE pulse and is termi-
nated on the rising edge. Contact MXIC for details.
RESET OPERATION
The RESET pin provides a hardware method of resetting
the device to reading array data.When the RESET pin is
driven low for at least a period of tRP, the device
immediately terminates any operation in progress,
tristates all output pins, and ignores all read/write
commands for the duration of the RESET pulse. The
device also resets the internal state machine to reading
array data.The operation that was interrupted should be
reinitiated once the device is ready to accept another
command sequence, to ensure data integrity
To verify programming of the protection circuitry, the pro-
gramming equipment must force VID on address pin A9 (
with CE and OE at VIL and WE at VIH). When A1=1, it
will produce a logical "1" code at device output Q0 for a
protected sector. Otherwise the device will produce 00H
for the unprotected sector. In this mode, the addresses,
except for A1, are don't care. Address locations with
A1= VIL are reserved to read manufacturer and device
codes.(Read Silicon ID)
Current is reduced for the duration of the RESET pulse.
When RESET is held at VSS±0.3V, the device draws
CMOS standby current (ICC4). If RESET is held at VIL
but not within VSS±0.3V, the standby current will be
greater.
It is also possible to determine if the group is protected
in the system by writing a Read Silicon ID command.
Performing a read operation with A1=VIH, it will produce
a logical "1" at Q0 for the protected sector.
The RESET pin may be tied to system reset circuitry. A
system reset would that also reset the Flash memory,
enabling the system to read the boot-up firm-ware from
the Flash memory.
CHIP UNPROTECT OPERATION
If RESET is asserted during a program or erase
operation, the RY/BY pin remains a "0" (busy) until the
internal reset operation is complete, which requires a time
of tREADY (during Embedded Algorithms).The system
can thus monitor RY/BY to determine whether the reset
operation is complete. If RESET is asserted when a
program or erase operation is not executing (RY/BY pin
is "1"), the reset operation is completed within a time of
tREADY (not during Embedded Algorithms).The system
can read data tRH after the RESET pin returns to VIH.
The MX29LV320AT/B also features the chip unprotect
mode, so that all sectors are unprotected after chip
unprotect is completed to incorporate any changes in
the code. It is recommended to protect all sectors before
activating chip unprotect mode.
The primary method requires VID on the RESET only.
This method can be implemented either in-system or via
programming equipment. This method uses standard
microprocessor bus cycle timing. Refer to Figure 13 for
timing diagram and Figure 14 illustrates the algorithm for
the sector group protection operation.
Refer to the AC Characteristics tables for RESET
parameters and to Figure 14 for the timing diagram.
The alternate method intended only for programming
equipment, must force VID on address pin A9 and con-
trol pin OE, (suggest VID = 12V) A6 = VIL and CE =
VIL(seeTable 2). Programming of the protection circuitry
begins on the falling edge of the WE pulse and is termi-
nated on the rising edge. Contact MXIC for details.
SECTOR GROUP PROTECT OPERATION
The MX29LV320AT/B features hardware sector group
protection. This feature will disable both program and
erase operations for these sector group protected. Sec-
tor protection can be implemented via two methods.
P/N:PM1008
REV. 1.1, MAY 28, 2004
12
Macronix [ MACRONIX INTERNATIONAL ]
