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MX29LV040CTC-70G 参数 Datasheet PDF下载

MX29LV040CTC-70G图片预览
型号: MX29LV040CTC-70G
PDF下载: 下载PDF文件 查看货源
内容描述: 4M- BIT [ 512K ×8 ] CMOS单电压3V只相当于行业FLASH MEMORY [4M-BIT [512K x 8] CMOS SINGLE VOLTAGE 3V ONLY EQUAL SECTOR FLASH MEMORY]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 52 页 / 485 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX29LV040C  
READING ARRAY DATA  
SECTOR ERASE COMMANDS  
The Automatic Sector Erase does not require the de-  
vice to be entirely pre-programmed prior to executing  
the Automatic Sector Erase Set-up command and Au-  
tomatic Sector Erase command. Upon executing the  
Automatic Sector Erase command, the device will auto-  
matically program and verify the sector(s) memory for  
an all-zero data pattern. The system is not required to  
provide any control or timing during these operations.  
The device is automatically set to reading array data  
after device power-up. No commands are required to  
retrieve data.The device is also ready to read array data  
after completing an Automatic Program or Automatic  
Erase algorithm.  
After the device accepts an Erase Suspend command,  
the device enters the Erase Suspend mode. The sys-  
tem can read array data using the standard read tim-  
ings, except that if it reads at an address within erase-  
suspended sectors, the device outputs status data. After  
completing a programming operation in the Erase  
Suspend mode, the system may once again read array  
data with the same exception. See Erase Suspend/Erase  
Resume Commandsfor more infor-mation on this mode.  
The system must issue the reset command to re-en-  
able the device for reading array data if Q5 goes high, or  
while in the autoselect mode. See the "Reset Command"  
section, next.  
When the sector(s) is automatically verified to contain  
an all-zero pattern, a self-timed sector erase and verify  
begin. The erase and verify operations are complete  
when the data on Q7 is "1" and the data on Q6 stops  
toggling for two consecutive read cycles, at which time  
the device returns to the Read mode. The system is not  
required to provide any control or timing during these  
operations.  
When using the Automatic sector Erase algorithm, note  
that the erase automatically terminates when adequate  
erase margin has been achieved for the memory array  
(no erase verification command is required). Sector  
erase is a six-bus cycle operation. There are two "un-  
lock" write cycles. These are followed by writing the  
set-up command 80H. Two more "unlock" write cycles  
are then followed by the sector erase command 30H.  
The sector address is latched on the falling edge of WE#  
or CE#, whichever happens later, while the  
command(data) is latched on the rising edge of WE# or  
CE#, whichever happens first. Sector addresses se-  
lected are loaded into internal register on the sixth fall-  
ing edge of WE# or CE#, whichever happens later. Each  
successive sector load cycle started by the falling edge  
of WE# or CE#, whichever happens later must begin  
within 50us from the rising edge of the preceding WE# or  
CE#, whichever happens first. Otherwise, the loading  
period ends and internal auto sector erase cycle starts.  
(Monitor Q3 to determine if the sector erase timer win-  
dow is still open, see section Q3, Sector Erase Timer.)  
Any command other than Sector Erase(30H) or Erase  
Suspend(B0H) during the time-out period resets the de-  
vice to read mode.  
RESET COMMAND  
Writing the reset command to the device resets the  
device to reading array data. Address bits are don't care  
for this command.  
The reset command may be written between the se-  
quence cycles in an erase command sequence before  
erasing begins. This resets the device to reading array  
data. Once erasure begins, however, the device ignores  
reset commands until the operation is complete.  
The reset command may be written between the se-  
quence cycles in a program command sequence be-fore  
programming begins. This resets the device to reading  
array data (also applies to programming in Erase  
Suspend mode). Once programming begins, however,  
the device ignores reset commands until the operation  
is complete.  
The reset command may be written between the se-  
quence cycles in an SILICON ID READ command  
sequence. Once in the SILICON ID READ mode, the  
reset command must be written to return to reading array  
data (also applies to SILICON ID READ during Erase  
Suspend).  
If Q5 goes high during a program or erase operation,  
writing the reset command returns the device to read-  
ing array data (also applies during Erase Suspend).  
P/N:PM1149  
REV. 1.3, APR. 24, 2006  
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