MX25U4035
MX25U8035
Figure 19. 4 x I/O Read enhance performance Mode Sequence (Command EB)
CS#
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
n
SCLK
4 dummy
cycles
8 Bit Instruction
6 Address cycles
Data Output
Performance
enhance
indicator (Note)
data
address
P4 P0
P5 P1
P6 P2
P7 P3
EB(hex)
SI/SIO0
bit4, bit0, bit4....
bit20, bit16..bit0
High Impedance
High Impedance
High Impedance
address
bit21, bit17..bit1
data
bit5 bit1, bit5....
SO/SIO1
WP#/SIO2
NC/SIO3
address
bit22, bit18..bit2
data
bit6 bit2, bit6....
address
bit23, bit19..bit3
data
bit7 bit3, bit7....
CS#
n+1
...........
n+7......n+9 ........... n+13
...........
SCLK
4 dummy
cycles
6 Address cycles
Data Output
Performance
enhance
indicator (Note)
data
address
P4 P0
P5 P1
P6 P2
P7 P3
SI/SIO0
bit4, bit0, bit4....
bit20, bit16..bit0
address
bit21, bit17..bit1
data
bit5 bit1, bit5....
SO/SIO1
WP#/SIO2
NC/SIO3
address
bit22, bit18..bit2
data
bit6 bit2, bit6....
address
bit23, bit19..bit3
data
bit7 bit3, bit7....
Note: Performance enhance mode, if P7=P3 & P6=P2 & P5=P1 & P4=P0 (Toggling), ex: A5, 5A, 0F
Reset the performance enhance mode, if P7=P3 or P6=P2 or P5=P1 or P4=P0, ex: AA, 00, FF
P/N: PM1394
REV. 1.0, MAR. 09, 2009
40
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