MX25L8005
Table 7. Power-Up Timing and VWI Threshold
Symbol
tVSL(1)
tPUW(1)
VWI(1)
Parameter
Min.
10
Max.
Unit
us
VCC(min) to CS# low
Time delay to Write instruction
Write Inhibit Voltage
1
10
ms
V
1.5
2.5
Note: 1. These parameters are characterized only.
INITIAL DELIVERY STATE
The device is delivered with the memory array erased: all bits are set to 1 (each byte contains FFh). The Status Register
contains 00h (all Status Register bits are 0).
P/N:PM1237
REV. 2.2, OCT. 23, 2008
22