Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
5
BATT ON
4.65V*
6
LOW LINE
3
V
CC
2
V
OUT
CHIP-ENABLE
OUTPUT
CONTROL
1
VBATT
CE IN
13
12
16
CE OUT
RESET
MAX691A
MAX693A
MAX800L
MAX800M
RESET
GENERATOR
15
RESET
7
8
TIMEBASE FOR
RESET AND
OSC IN
OSC SEL
WATCHDOG
WATCHDOG
TRANSITION
DETECTOR
11
9
WATCHDOG
TIMER
14
10
WDI
PFI
WDO
PFO
1.25V
4
GND
* 4.4V FOR THE MAX693A/MAX800M
Figure 4. MAX691A/MAX693A/MAX800L/MAX800M Block Diagram
5.0V
V
CC
RESET
THRESHOLD
4.0V
5.0V
CE IN
1693L/AX80M
0V
5V
CE OUT
0V
15µs
100µs
100µs
5V
RESET
RESET
0V
5V
0V
LOGIC LEVELS SHOWN ARE FROM 0V TO 5V.
Figure 5. Reset and Chip-Enable Timing
10 ______________________________________________________________________________________