±±1°C ꢀMꢁusꢂ°oꢃpatiꢄle ꢅeꢃote/ꢆocal ꢇeꢃperature
ꢀensors with Overteꢃperature Alarꢃs
Table 2. Data Format (Two's Complement)
Table 3. Extended Resolution Register
FRACTIONAL
CONTENTS OF
DIGITAL OUTPUT
TEMPERATURE
EXTENDED REGISTER
TEMP (°C)
MAX6658
MAX6659
MAX6657
0.000
0.125
0.250
0.375
0.500
0.625
0.750
0.875
000X XXXX
001X XXXX
010X XXXX
011X XXXX
100X XXXX
101X XXXX
110X XXXX
111X XXXX
130.00
127.00
126.00
25
0 111 1111
0 111 1111
0 111 1111
0 001 1001
0 000 0000
1 000 0000
1 000 0000
1 000 0000
0 111 1111
0 111 1111
0 111 1111
0 001 1001
0 000 0000
1 111 1111
1 110 0111
1 100 1001
0.00
-1
-25
Note: Extended resolution applies only for conversion rates of
4Hz and slower.
-55
Diode Fault
(Short or Open)
1 000 0000
1 000 0000
Alert ꢅesponse Address
The SMBus Alert Response interrupt pointer provides
quick fault identification for simple slave devices that
lack the complex, expensive logic needed to be a bus
master. Upon receiving an ALERT interrupt signal, the
host master can broadcast a Receive Byte transmission
to the Alert Response slave address (0001100). Then,
any slave device that generated an interrupt attempts
to identify itself by putting its own address on the bus
(Table 8).
Alarꢃ ꢇhreshold ꢅegisters
Four registers store ALERT threshold values—one high-
temperature (T ) and one low-temperature (T
register each for the local and remote channels. If
either measured temperature equals or exceeds the
corresponding ALERT threshold value, the ALERT out-
put is asserted.
)
LOW
HIGH
The POR state of both ALERT T
0110 or +70°C and the POR state of T
1100 1001 or -55°C.
registers is 0100
LOW
HIGH
The Alert Response can activate several different slave
devices simultaneously, similar to the I2C General Call.
If more than one slave attempts to respond, bus arbitra-
tion rules apply, and the device with the lower address
code wins. The losing device does not generate an
acknowledge and continues to hold the ALERT line low
until cleared. (The conditions for clearing an alert vary,
depending on the type of slave device.) Successful
completion of the Alert Response protocol clears the
interrupt latch, provided the condition that caused the
alert no longer exists. If the condition still exists, the
device reasserts the ALERT interrupt at the end of the
next conversion.
registers is
Four additional registers store remote and local alarm
threshold data corresponding to the OVERT1 and
OVERT2 (MAX6659 only) outputs. The values stored in
these registers are high-temperature thresholds. If any
one of the measured temperatures equals or exceeds
the corresponding alarm threshold value, an OVERT
output is asserted. The POR state of the OVERT thresh-
old is 0101 0101 or +85°C.
Alert Interrupts
An ALERT interrupt occurs when the internal or external
temperature reading exceeds a high or low tempera-
ture limit (user programmed) or when the remote diode
is disconnected (for continuity fault detection). The
ALERT interrupt output signal is latched and can be
cleared only by either reading the Status register or by
successfully responding to an Alert Response address.
In both cases, the alert is cleared even if the fault con-
dition still exists, but is reasserted at the end of the next
conversion. The interrupt does not halt automatic con-
versions. The interrupt output pin is open-drain so that
multiple devices can share a common interrupt line.
The interrupt rate never exceeds the conversion rate.
OVERT Overteꢃperature
Alarꢃ/Warning Outputs
OVERT1 and OVERT2 (MAX6659 only) are asserted
when the temperature rises to a value programmed in
the appropriate threshold register. They are deasserted
when the temperature drops below this threshold minus
the hysteresis. An OVERT output can be used to acti-
vate a cooling fan, send a warning, or trigger a system
shutdown to prevent component damage. The HYST
byte sets the amount of hysteresis for both OVERT out-
puts. The data format for the HYST byte is the same for
the other temperature registers (Table 2).
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
