SC70, Single/Dual Low-Voltage,
Low-Power µP Reset Circuits
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= full range, T
A
= -40°C to +125°C, unless otherwise specified. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
MR
Minimum Input Pulse Width
MR
Glitch Rejection
MR
to Reset Delay
MR
Internal Pullup Resistance
MAX6381–MAX6389
MAX6390
T
A
= +25°C
Reset IN Input Threshold
V
THRST
T
A
= 0°C to +85°C
T
A
= -40°C to +125°C
RESET IN to RESET Delay
RESET IN Input Leakage Current
Open-Drain
RESET
Output
Voltage
Open-Drain
RESET
Output
Leakage Current
I
RESET IN
V
CC
≥
4.5V, I
SINK
= 3.2mA, reset asserted
V
OL
V
CC
≥
2.5V, I
SINK
= 1.2mA, reset asserted
V
CC
≥
1.0V, I
SINK
= 80µA, reset asserted
I
LKG
V
CC
> V
TH
,
RESET
not asserted
V
CC
≥
4.5V, I
SINK
= 3.2mA, reset asserted
V
OL
Push-Pull
RESET
Output Voltage
V
OH
V
CC
≥
2.5V, I
SINK
= 1.2mA, reset asserted
V
CC
≥
1.0V, I
SINK
= 80µA, reset asserted
V
CC
≥
4.5V, I
SOURCE
= 800µA, reset not
asserted
V
CC
≥
2.5V, I
SOURCE
= 500µA, reset not
asserted
V
CC
≥
4.5V, I
SOURCE
= 800µA, reset asserted
V
CC
≥
2.5V, I
SOURCE
= 500µA, reset asserted
V
OH
V
CC
≥
1.8V, I
SOURCE
= 150µA, reset asserted
Push-Pull RESET Output Voltage
V
CC
≥
1.0V, I
SOURCE
= 1µA, reset asserted
V
CC
≥
4.5V, I
SINK
= 3.2mA, reset not
asserted
V
OL
V
CC
≥
2.5V, I
SINK
= 1.2mA, reset not
asserted
0.8
✕
V
CC
0.8
✕
V
CC
0.8
✕
V
CC
0.8
✕
V
CC
0.8
✕
V
CC
0.8
✕
V
CC
0.4
0.3
V
RESETIN
falling at 4mV/µs from
V
THRST
+ 40mV to V
THRST
- 40mV
-50
32
800
1.245
1.232
1.219
4.5
±1
+50
0.4
0.3
0.3
1.0
0.4
0.3
0.3
V
µA
V
SYMBOL
CONDITIONS
MIN
1
100
200
63
1350
1.27
100
2300
1.295
1.308
1.321
µs
nA
V
TYP
MAX
UNITS
µs
ns
ns
kΩ
Ω
MAX6381–MAX6390
V
Note 1:
Specifications over temperature are guaranteed by design, not production tested.
_______________________________________________________________________________________
3
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
