+5 V, Lo w -P o w e r, Vo lt a g e -Ou t p u t ,
S e ria l 1 2 -Bit DACs
18/MAX539
ELECTRICAL CHARACTERISTICS—Dual Supplies (MAX531 Only) (continued)
(V = +5V ±10%, V = -5V ±10%, AGND = DGND = 0V, REFIN = 2.048V (external), RFB = BIPOFF = VOUT, C = 33µF,
DD
SS
REFOUT
R = 10kΩ, C = 100pF, T = T
to T , unless otherwise noted.)
MAX
L
L
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VOLTAGE OUTPUT (VOUT)
MAX531 (G = +1)
MAX531 (G = +2)
V
+ 2
V
- 2
SS
DD
Output Voltage Range
V
V
SS
+ 0.4
V
DD
- 0.4
1
Output Load Regulation
Short-Circuit Current
VOUT = 2V, R = 2kΩ
LSB
mA
L
I
SC
12
DYNAMIC PERFORMANCE
Voltage-Output Slew Rate
Voltage-Output Settling Time
Digital Feedthrough
SR
0.15
0.25
25
5
V/µs
µs
To ±1/2LSB, VOUT = 2V
Step 000 hex to FFF hex
nV-s
REFIN = 1kHz, 2Vp-p, (G = +1)
REFIN = 1kHz, 2Vp-p, (G = +2)
68
68
Signal-to-Noise plus Distortion
SINAD
dB
POWER SUPPLY
Positive Supply Voltage
Negative Supply Voltage
Positive Supply Current
Negative Supply Current
SWITCHING CHARACTERISTICS
CS Setup Time
V
4.5
5.5
V
V
DD
V
SS
-5.5
0
I
DD
All inputs = 0V or V , no load
260
400
µA
µA
DD
I
SS
All inputs = 0V or V , no load
-120
-200
DD
t
20
15
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CSS
t
t
SCLK Fall to CS Fall Hold Time
SCLK Fall to CS Rise Hold Time
SCLK High Width
CSH0
CSH1
t
35
35
45
0
CH
SCLK Low Width
t
CL
DS
DH
DO
DIN Setup Time
t
DIN Hold Time
t
DOUT Valid Propagation Delay
CS High Pulse Width
t
C
= 50pF
80
L
t
20
25
50
CSW
t
CLR Pulse Width
CLR
t
CS Rise to SCLK Rise Setup Time
CS1
Note 2: In single-supply operation, INL and GE calculated from code 11 to code 4095. Tested at V = +5V.
DD
Note 3: This specification applies to both gain-error power-supply rejection ratio and offset-error power-supply rejection ratio.
Note 4: Guaranteed by design.
Note 5: Tested at I
= 100µA. The reference can typically source up to 5mA (see Typical Operating Characteristics).
OUT
_______________________________________________________________________________________
5
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
