Tracking, Sinking and Sourcing, Synchronous Buck
Controller for DDR Memory and Termination Supplies
2
Design Procedure
∆I
× L
(
)
LOAD(MAX)
Firmly establish the input voltage range and maximum
load current before choosing a switching frequency
and inductor operating point (ripple current ratio). The
primary design trade-off is in choosing a good switch-
ing frequency and inductor operating point, and the fol-
lowing four factors dictate the rest of the design:
V
=
kHz
SAG
2 × C × DUTY × V
− V
OUT
(
)
f
IN(MIN)
Output Inductor Selection
The switching frequency (on time) and operating point
(% ripple or LIR) determine the inductor value as follows:
1) Input Voltage Range. The maximum value
V
OUT
L =
(V
) must accommodate the worst-case high
IN(MAX)
f × LIR × I
LOAD(MAX)
input voltage. The minimum value (V
) must
IN(MIN)
account for the lowest input voltage after drops due
to connectors, fuses, and battery selector switches.
If there is a choice at all, lower input voltages result
in better efficiency.
Example: I
= 7A, V
= 1.25V, f = 550kHz,
LOAD(MAX)
50% ripple current or LIR = 0.5:
OUT
1.25V
L =
= 0.65µH 0.68µH
(
)
2) Maximum Load Current. There are two values to
550kHz × 0.5 × 7A
consider. The peak load current (I
)
LOAD(MAX)
determines the instantaneous component stresses
and filtering requirements, and thus drives output
capacitor selection, inductor saturation rating, and
the design of the current-limit circuit. The continu-
Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Ferrite
cores are often the best choice, although powdered
iron is inexpensive and can work well at 200kHz. The
core must be large enough not to saturate at the peak
inductor current:
ous load current (I
) determines the thermal
LOAD
stresses and thus drives the selection of input
capacitors, MOSFETs, and other critical heat-con-
tributing components.
(I
): I
= I
+ (LIR / 2) (I
)
LOAD(MAX)
PEAK PEAK
LOAD(MAX)
3) Switching Frequency. This determines the basic
trade-off between size and efficiency. The optimal
frequency is largely a function of maximum input
voltage, due to MOSFET switching losses that are
Output Capacitor Selection
The output filter capacitor must have low enough ESR
to meet output ripple and load-transient requirements,
yet have high enough ESR to satisfy stability require-
ments. Also, the capacitance value must be high
enough to absorb the inductor energy going from a
positive full-load to negative full-load condition or vice
versa without incurring significant over/undershoot. In
DDR termination applications where the output is sub-
ject to violent load transients, the output capacitor’s
size depends on how much ESR is needed to prevent
the output from dipping too low under a load transient.
Ignoring the sag due to finite capacitance:
2
proportional to frequency and V . The optimum
IN
frequency is also a moving target, due to rapid
improvements in MOSFET technology that are mak-
ing higher frequencies more practical.
4) Inductor Operating Point. This provides trade-offs
between size and efficiency. Low inductor values
cause large ripple currents, resulting in the smallest
size but poor efficiency and high output noise. The
minimum practical inductor value is one that causes
the circuit to operate at the edge of critical conduc-
tion (where the inductor current just touches zero
with every cycle at maximum load). Inductor values
lower than this grant no further size-reduction benefit.
V
40mV
14A
DIP
LOAD(MAX)
R
≤
=
= 2.85mΩ
ESR
The inductor ripple current also impacts transient-
I
response performance, especially at low V - V
dif-
OUT
IN
ferentials. Low inductor values allow the inductor
current to slew faster, replenishing charge removed
from the output filter capacitors by a sudden load step.
The amount of output sag is also a function of the maxi-
mum duty factor, which can be calculated from the on
time and minimum off time:
In DDR applications, V
= 40mV, the output capaci-
DIP
tor’s size depends on how much ESR is needed to
maintain an acceptable level of output voltage ripple:
V
9mV
P−P
R
≤
=
= 2.57mΩ
ESR
LIR × I
0.5 × 7A
LOAD(MAX)
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