Notebook CPU Step-Down Controller for Intel
-
Mobile Voltage Positioning (IMVP II)
I
∆i
∆t
V
- V
PEAK
BATT OUT
=
L
I
PEAK
I
I
LOAD
LIMIT
I
= I
/2
LOAD PEAK
0
ON-TIME
TIME
0
TIME
Figure 6. Pulse-Skipping/Discontinuous Crossover Point
Figure 7. “Valley” Current-Limit Threshold Point
(Figure 7). The actual peak current is greater than the
current-limit threshold by an amount equal to the induc-
tor ripple current. Therefore, the exact current-limit
characteristic and maximum load capability are a func-
tion of the MOSFET on-resistance, inductor value, and
battery voltage. The reward for this uncertainty is
robust, lossless overcurrent sensing. When combined
with the undervoltage protection circuit, this current-
limit method is effective in almost every circumstance.
MOSFET Gate Drivers (DH, DL)
The DH and DL drivers are optimized for driving mod-
erate-sized high-side and larger low-side power
MOSFETs. This is consistent with the low duty factor
seen in the notebook CPU environment, where a large
V
- V
differential exists. An adaptive dead-time
BATT
OUT
circuit monitors the DL output and prevents the high-
side FET from turning on until DL is fully off. There must
be a low-resistance, low-inductance path from the DL
driver to the MOSFET gate for the adaptive dead-time cir-
cuit to work properly. Otherwise, the sense circuitry in the
MAX1718 will interpret the MOSFET gate as “off” while
there is actually still charge left on the gate. Use very
short, wide traces measuring 10 to 20 squares (50 to 100
mils wide if the MOSFET is 1 inch from the MAX1718).
There is also a negative current limit that prevents
excessive reverse inductor currents when V
is sinking
OUT
current. The negative current-limit threshold is set to
approximately 120% of the positive current limit, and
therefore tracks the positive current limit when ILIM is
adjusted.
The dead time at the other edge (DH turning off) is
determined by a fixed 35ns (typ) internal delay.
The current-limit threshold is adjusted with an external
resistor-divider at ILIM. The current-limit threshold volt-
age adjustment range is from 50mV to 300mV. In the
adjustable mode, the current-limit threshold voltage is
precisely 1/10th the voltage seen at ILIM. The threshold
The internal pulldown transistor that drives DL low is
robust, with a 0.4Ω (typ) on-resistance. This helps pre-
vent DL from being pulled up during the fast rise-time
of the inductor node, due to capacitive coupling from
the drain to the gate of the low-side synchronous-rectifi-
er MOSFET. However, for high-current applications, you
might still encounter some combinations of high- and
low-side FETs that will cause excessive gate-drain cou-
pling, which can lead to efficiency-killing, EMI-
producing shoot-through currents. This is often remedied
by adding a resistor in series with BST, which increases
the turn-on time of the high-side FET without degrading
the turn-off time (Figure 8).
defaults to 100mV when ILIM is connected to V . The
CC
logic threshold for switchover to the 100mV default
value is approximately V
- 1V.
CC
The adjustable current limit accommodates MOSFETs
with a wide range of on-resistance characteristics (see
the Design Procedure section). For a high-accuracy
current-limit application, see Figure 16.
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors don’t corrupt the current-
sense signals seen by LX and GND. Place the IC close
to the low-side MOSFET with short, direct traces, mak-
ing a Kelvin sense connection to the source and drain
terminals.
POR
rises above
Power-on reset (POR) occurs when V
CC
approximately 2V, resetting the fault latch and preparing
the PWM for operation. V undervoltage lockout
CC
16 ______________________________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
