Co m p a c t , Hig h -Effic ie n c y, Du a l-Ou t p u t
S t e p -Up a n d LCD Bia s DC-DC Co n ve rt e r
MAX167
flip -flop , turning on the N-c ha nne l MOSFET s witc h
Synchronous Rectifier
The MAX1677 MBC features an internal 1Ω P-channel
synchronous rectifier. Synchronous rectification typical-
ly improves efficiency by 5% or more over similar non-
s ync hronous s te p -up d e s ig ns . In PWM mod e , the
synchronous rectifier turns on during the second half of
each cycle. In PFM mode, an internal comparator turns
on the synchronous rectifier when the voltage at LX
exceeds the MBC output, and then turns it off when the
inductor current drops below 90mA (typ).
(Figure 5). When the inductor current ramps to the PFM
mode current limit (350mA), the current-sense compara-
tor resets a flip-flop. The flip-flop turns off the N-channel
switch and turns on the P-channel synchronous rectifier.
The energy stored in the inductor is transferred to the
output through the P-channel switch. A second flip-flop,
previously reset by the switch’s “on” signal, inhibits the
next cycle until the inductor current is depleted and the
output is out of regulation. This forces operation with
discontinuous inductor current in PFM mode.
The on-chip synchronous rectifier allows the external
Schottky diode to be omitted in designs that operate
from inputs exceeding 1.4V. In circuits operating below
1.4V (1-cell inputs, for example), connecting a Schottky
diode in parallel with the internal synchronous rectifier
(from LX to POUT) provides the lowest start-up voltage.
Start-Up Oscillator
The MBC employs a low-voltage start-up oscillator to
ensure a 1.1V (0.9V typical) start-up voltage. On start-
up, if the output voltage is less than 2.25V, the P-chan-
nel switch stays off and the N-channel pulses at a 25%
duty cycle. When the output voltage exceeds 2.25V,
the normal PWM or PFM control circuitry takes over.
Once the MBC is in regulation, it can operate with
inputs down to 0.7V since the internal power for the IC
is taken from OUT. The MBC cannot supply full output
current until OUT reaches 2.5V.
LCD Bo o s t Co n ve rt e r (LCD)
The LCD converter can be configured for a positive or
negative output by setting the LCDPOL pin and using
the appropriate circuit (Figures 2 and 3, and Table 3).
A combination of peak current limiting and a pair of
one-shot timers control LCD switching. During the on-
cycle the internal N-channel DMOS switch turns on,
and inductor current ramps up until either the switch
peak current limit is reached or the 5.2µs maximum on-
time expires (typically at low input voltages). After the
on-cycle terminates, the switch turns off and the output
capacitor charges. The switch remains off until the error
comparator initiates another cycle.
Table 2. Selecting MBC Operating Mode
CLK/SEL
MBC MODE
FEATURES
0
Low-Power PFM Lowest Supply Current
High Output Current,
PWM
1
Fixed-Frequency Ripple
The LCDLX current limit is set by LCDPOL, as outlined
in Ta b le 3. The lowe r, 225mA p e a k c urre nt s e tting
allows tiny low-current “chip” inductors to be used
when powering smaller (less than 15 square inches)
liquid crystal panels. Use the following equation to
d e te rmine whic h LCDLX c urre nt-limit s e tting is
required.
Ext Clock
(200Hz to
400kHz)
High Output Current,
Synchronized
Synchronized Ripple
PWM
Frequency
Q
D
LOGIC HIGH
POUT
P
Q
I
= (0.7 · I
· V
) / (2 · V
)
LCD
PK(LCD)
IN(MIN)
LCD(MAX)
R
where I
is the output current, V
is the mini-
is the maxi-
LCD
IN(MIN)
mum expected input voltage, V
LCD(MAX)
mum required LCD output voltage, and I
is
PK(LCD)
350mA or 225mA as set by LCDPOL. The 0.7 term is a
correction factor to conservatively account for typical
switch, inductor, and diode losses.
LX
N
V
FB
S
Q
The LCD boost is enabled when both ON and LCDON
are high, and the MBC output voltage is within 90% of
its set value. A soft-start start-up mode with increased
off time reduces transient input current when the LCD is
activated.
V
REF
R
CURRENT
LIMIT LEVEL
PGND
Figure 5. Controller Block Diagram in PFM Mode
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