Co m p a c t , Hig h -Effic ie n c y, Du a l-Ou t p u t
S t e p -Up a n d LCD Bia s DC-DC Co n ve rt e r
POUT
P
R3
10Ω
3.3V MAIN
BOOST OUTPUT
FEEDBACK
REF
OUT
GND
POUT
LX
N
C2
100µF
R
S
Q
C4
0.1µF
L1
10µH
MAX1677
V
C1
100µF
IN
LX
MAX167
L2
10µH
LCDLX
REF
PWM-MODE
CURRENT-
LIMIT LEVEL
PGND
D2
MBR0530
LCDON
C5
0.1µF
OSC
CLK/SEL
LCD BOOST OUTPUT
FB
ON
C3
LCDGND
4.7µF
Figure 4. Controller Block Diagram in PWM Mode
LCDPOL
R1
R2
output voltage. In PWM mode, the MBC can supply up
to 350mA. Switching harmonics generated by the fixed-
frequency operation are consistent and easily filtered.
LCDFB
PGND
During PWM operation, the rising edge of the internal
clock sets a flip-flop, which turns on the N-channel
MOSFET (Figure 4). The switch turns off when the sum
of the voltage-error, slope-compensation, and current-
feedback signals trips the multi-input comparator and
resets the flip-flop; the switch remains off for the rest of
the cycle. Changes in the output voltage error signal
shift the inductor current level and modulate the MOS-
FET pulse width.
Figure 2. LCD Converter in Positive Mode
R3
10Ω
3.3V MAIN
BOOST OUTPUT
Clock-Synchronized PWM
The MAX1677 operates as a clock-synchronized cur-
re nt-mod e PWM whe n a c loc k s ig na l (200kHz to
400kHz) is applied to CLK/SEL. This allows switching
harmonics to be positioned to avoid sensitive frequen-
cy bands, such as those near IF frequencies in wireless
applications.
OUT
GND
POUT
C2
100µF
C4
0.1µF
L1
10µH
MAX1677
V
C1
100µF
IN
LX
L2
10µH
LCDLX
REF
C6
0.1µF
D2
MBR0530
Low Power PFM Mode
Pulling CLK/SEL low places the MAX1677 in low-power
standby mode. During standby mode, PFM operation
regulates the output voltage by transferring a fixed
amount of energy during each cycle, and then modulat-
ing the switching frequency to control the power deliv-
ered to the output. The device switches only as needed
to service the load, resulting in the highest possible effi-
ciency at light loads and an operating current of only
20µA. The MBC can supply up to 170mA when in PFM
mode (Table 1).
LCDON
CLK/SEL
ON
D3
C5
0.1µF
MBR0530
-LCD BOOST
OUTPUT
FB
C3
4.7µF
LCDGND
R2
R1
LCDPOL
PGND
LCDFB
During PFM operation, the error comparator detects
when the output voltage is out of regulation and sets a
Figure 3. LCD Converter in Negative Mode
10 ______________________________________________________________________________________