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MAX1653ESE 参数 Datasheet PDF下载

MAX1653ESE图片预览
型号: MAX1653ESE
PDF下载: 下载PDF文件 查看货源
内容描述: 高效率, PWM ,降压型DC- DC控制器,16引脚QSOP [High-Efficiency, PWM, Step-Down DC-DC Controllers in 16-Pin QSOP]
分类和应用: 控制器
文件页数/大小: 28 页 / 266 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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Hig h -Effic ie n c y, P WM, S t e p -Do w n  
DC-DC Co n t ro lle rs in 1 6 -P in QS OP  
With high input voltages, the required duty factor is  
approximately (V + V )/ V , where V is the volt-  
on-time beyond the point where the inductor current  
crosses zero (in discontinuous mode). This causes the  
inductor (primary) current to reverse, which in turn pulls  
current out of the output filter capacitor and causes the  
flyback transformer to operate in the forward mode. The  
low impedance presented by the transformer secondary  
in the forward mode dumps current into the secondary  
output, charging up the secondary capacitor and bring-  
ing SECFB back into regulation. The SECFB feedback  
loop does not improve secondary output accuracy in  
normal flyback mode, where the main (primary) output is  
heavily loaded. In this mode, secondary output accura-  
cy is determined (as usual) by the secondary rectifier  
drop, turns ratio, and accuracy of the main output volt-  
age. Hence, a linear post-regulator may still be needed  
in order to meet tight output accuracy specifications.  
OUT  
Q2  
IN  
Q2  
a g e d rop a c ros s the s ync hronous re c tifie r. The  
MAX1652s minimum d uty fa c tor is d e te rmine d b y  
delays through the feedback network, error comparator,  
internal logic gate drivers, and the external MOSFETs,  
which typically total 400ns. This delay is about 12% of  
the switching period at 300kHz and 6% at 150kHz, limit-  
ing the typical minimum duty factor to these values.  
Even if the circuit can not attain the required duty factor  
dictated by the input and output voltages, the output  
voltage will remain in regulation. However, there may be  
intermittent or continuous half-frequency operation. This  
can cause a factor-of-two increase in output voltage rip-  
ple and current ripple, which will increase noise and  
reduce efficiency. Choose 150kHz operation for high-  
input-voltage/low-output-voltage circuits.  
The secondary output voltage-regulation point is deter-  
mined by an external resistor-divider at SECFB. For neg-  
a tive outp ut volta g e s , the SECFB c omp a ra tor is  
referenced to GND (MAX1654); for positive output volt-  
a g e s , SECFB re g ula te s a t the 2.50V re fe re nc e  
(MAX1652). As a result, output resistor-divider connec-  
tions and design equations for the two device types dif-  
fe r s lig htly (Fig ure 7). Ord ina rily, the s e c ond a ry  
regulation point is set 5% to 10% below the voltage nor-  
mally produced by the flyback effect. For example, if the  
2–MAX165  
S e c o n d a ry Fe e d b a c k -Re g u la t io n Lo o p  
(S ECFB P in )  
A flyback winding control loop regulates a secondary  
winding output (MAX1652/MAX1654 only), improving  
cross-regulation when the primary is lightly loaded  
or when there is a low input-output differential voltage.  
If SECFB crosses its regulation threshold, a 1µs one-  
s hot is triggered that extends the low-side switchs  
0.33µF  
REF  
R3  
R3  
SECFB  
SECFB  
1-SHOT  
1-SHOT  
TRIG  
TRIG  
R2  
R2  
POSITIVE  
NEGATIVE  
SECONDARY  
OUTPUT  
V+  
V+  
2.5V REF  
DH  
SECONDARY  
OUTPUT  
DH  
DL  
MAIN  
OUTPUT  
MAX1652  
MAX1654  
MAIN  
OUTPUT  
DL  
R2  
+V = V (1 + –––)  
R2  
-V = -V (–––)  
WHERE V (NOMINAL) = 2.5V  
R3 = 100k(RECOMMENDED)  
TRIP  
REF  
REF  
TRIP  
REF  
R3  
R3  
Figure 7. Secondary-Output Feedback Dividers  
18 ______________________________________________________________________________________