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MAX153EAP+ 参数 Datasheet PDF下载

MAX153EAP+图片预览
型号: MAX153EAP+
PDF下载: 下载PDF文件 查看货源
内容描述: [ADC, Flash Method, 8-Bit, 1 Func, 2 Channel, Parallel, 8 Bits Access, CMOS, PDSO20, SSOP-20]
分类和应用: 光电二极管转换器
文件页数/大小: 13 页 / 794 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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MAX153  
1Msps, µP-Compatible,  
8-Bit ADC with 1µA Power-Down  
The internal resistances from V  
and V  
may be  
Input Current  
REF+  
REF-  
asꢀlowꢀasꢀ1kΩ.ꢀSinceꢀcurrentꢀisꢀstillꢀdrawnꢀbyꢀtheꢀreferenceꢀ  
inputs during power-down, reference supply current can  
be reduced during shutdown by using the circuit shown  
inꢀFigureꢀ7d.ꢀAꢀlogic-levelꢀn-channelꢀMOSFET,ꢀconnectedꢀ  
Figureꢀ 8ꢀ showsꢀ theꢀ equivalentꢀ circuitꢀ ofꢀ theꢀ converterꢀ  
input. When the conversion starts and WR is low, V is  
IN  
connectedꢀtoꢀ16ꢀ0.6pFꢀcapacitors.ꢀDuringꢀthisꢀacquisitionꢀ  
phase, the input capacitors charge to the input voltage  
through the resistance of the internal analog switches  
(aboutꢀ 2kΩ).ꢀ Inꢀ addition,ꢀ aboutꢀ 12pFꢀ ofꢀ strayꢀ capaci-  
tance must be charged. The input can be modeled as an  
equivalentꢀRCꢀnetworkꢀ(Figureꢀ9).ꢀAsꢀsourceꢀimpedanceꢀ  
increases,ꢀtheꢀcapacitorsꢀtakeꢀlongerꢀtoꢀcharge.  
between V  
and ground, disconnects the reference  
REF-  
load when the ADC enters power-down. (PWRDN = low).  
TheꢀFETꢀshouldꢀhaveꢀnoꢀmoreꢀthanꢀ0.5Ωꢀofꢀon-resistanceꢀ  
to maintain accuracy.  
Bypassing  
Thetypical22pFinputcapacitanceallowssourceresis-  
tanceꢀasꢀhighꢀasꢀ2.2kΩꢀwithoutꢀsetupꢀproblems.ꢀForꢀlargerꢀ  
Aꢀ 4.7µFꢀ electrolyticꢀ inꢀ parallelꢀ withꢀ aꢀ 0.1µFꢀ ceramicꢀ  
capacitor should be used to bypass V ꢀtoꢀGND.ꢀTheseꢀ  
DD  
resistances, the acquisition time (t ) must be increased  
P
capacitors should have minimal lead length.  
Theꢀ referenceꢀ inputsꢀ shouldꢀ beꢀ bypassedꢀ withꢀ 0.1µFꢀ  
capacitors,ꢀasꢀshownꢀinꢀFiguresꢀ7a–7c.  
1
V
V
IN  
IN+  
10  
1
GND  
V
IN+  
V
IN  
10  
MAX153  
V
IN-  
GND  
20  
12  
11  
+5V  
V
V
V
DD  
MAX153  
20  
12  
11  
0.1µF  
4.7µF  
+5V  
V
V
V
DD  
REF+  
REF-  
+2.5V  
*
0.1µF  
4.7µF  
REF+  
REF-  
V
IN-  
0.1µF  
0.1µF  
*CURRENT PATH MUST STILL  
EXIST FROM V TO GND  
IN-  
Figure 7a. Power Supply as Reference  
Figure 7c. Input Not Referenced to GND  
20  
V
IN+  
V
DD  
1
0.1µF  
0.1µF  
V
V
IN  
IN+  
MAX153  
10  
V
GND  
IN-  
12  
11  
18  
MAX584  
V
REF+  
MAX153  
20  
12  
11  
V
V
V
+5V  
DD  
V
REF-  
+2.5V  
0.1µF  
0.1µF  
4.7µF  
MAX584  
REF+  
REF-  
PWRDN  
PWRDN  
0.1µF  
N-FET  
Figure 7b. External Reference, +2.5V Full Scale  
Figure 7d. An n-Channel MOSFET Switches Off the Reference  
Load During Power-Down  
Maxim Integrated  
10  
www.maximintegrated.com