1ꢀ5k EꢁDꢂ-rotected UꢁB Transceivers with
External/Internal -ullup Resistors
Timing Diagrams
t , t
FR LR
t , t
FF LF
V
OHD
90%
90%
OE
10%
10%
V
OLD
VP/VM CONNECTED TO GND,
D+/D- CONNECTED
TO PULLUP
D+/D-
Figure 1. Rise and Fall Times
t
t
PZL_DRV
PLZ_DRV
VP AND VM RISE/FALL TIMES < 4ns
VM
VP
VP/VM CONNECTED TO V ,
L
D+/D- CONNECTED
TO PULLDOWN
OE
D+/D-
t
t
PLH_DRV
PHL_DRV
D-
t
t
PZH_DRV
PHZ_DRV
V
, V
CRS_F CRS_L
D+
Figure 2. Timing of VP and VM to D+ and D-
Figure 3. Driver’s Enable and Disable Timing
stand voltage measured to IEC 61000-4-2 generally is
lower than that measured using the Human Body
Model. Figure 8 shows the IEC 61000-4-2 model. The
Contact Discharge method connects the probe to the
device before the probe is charged.
tance. Its objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing. All pins require this protection during
manufacturing, not just inputs and outputs. After PC
board assembly, the Machine Model is less relevant to
I/O ports.
Machine Model
The Machine Model for ESD tests all connections using
a 200pF storage capacitor and zero discharge resis-
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