MAX11329–MAX11332
3Msps, 12-/10-Bit, 8-/16-Channel ADCs with
Post-Mux External Signal Conditioning Access
INTERNAL
EXTERNAL
INTERNAL/EXTERNAL
CLOCK
ADC MODE CONTROL REGISTER
YES
NO
SET SCAN[3:0] TO 0001
SET CHSEL[3:0] TO CHANNEL NUMBER
SELECT THE PM[1:0] BITS
REPEAT
AVERAGE
MANUAL
YES
YES
YES
YES
YES
YES
NO
NO
ADC CONFIGURATION REGISTER
SET AVG ON BIT TO 1
SET NAVG[1:0] TO N
ADC CONFIGURATION REGISTER
SET NSCAN[1:0] FOR SCAN COUNT
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0100
SET CHSEL[3:0] TO CHANNEL NUMBER
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0010
SET CHSEL[3:0] TO CHANNEL NUMBER
SELECT THE RIGHT SWCNV BIT
STANDARD-EXT
NO
YES
NO
STANDARD-INT
AVERAGE
YES
NO
ADC CONFIGURATION REGISTER
SET AVG ON BIT TO 1
SET NAVG[1:0] TO N
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0110
SET CHSEL[3:0] TO CHANNEL NUMBER
UPPER-EXT
NO
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0011
SET CHSEL[3:0] TO CHANNEL NUMBER
SELECT THE RIGHT SWCNV BIT
YES
NO
UPPER-INT
AVERAGE
YES
NO
ADC CONFIGURATION REGISTER
SET AVG ON BIT TO 1
SET NAVG[1:0] TO N
SET CUSTOM Scan0 REGISTER
SET CUSTOM Scan1 REGISTER
CUSTOM-EXT
NO
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0101
SET CHSEL[3:0] TO CHANNEL NUMBER
SELECT THE RIGHT SWCNV BIT
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 1000
SET CHSEL[3:0] TO CHANNEL NUMBER
YES
NO
CUSTOM-INT
AVERAGE
YES
NO
ADC CONFIGURATION REGISTER
SET AVGON BIT TO 1
SET NAVG[1:0] TO N
SampleSet REGISTER
SET SEQ_DEPTH[7:0] TO SET
CHANNEL CAPTURE DEPTH
SampleSet
SET CUSTOM Scan0 REGISTER
SET CUSTOM Scan1 REGISTER
FOLLOW SampleSet REGISTER WITH
CHANNEL PATTERN OF THE SAME SIZE
AS SEQUENCE DEPTH
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0111
SET CHSEL[3:0] TO CHANNEL NUMBER
SELECT THE RIGHT SWCNV BIT
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 1001
SET CHSEL[3:0] TO CHANNEL NUMBER
Figure 12. ADC Mode Select Programming Sequence
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
