DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
11. CLOCK BLOCKING REGISTERS
The receive-channel blocking registers (RCBR1/RCBR2/RCBR3/RCBR4) and the transmit-channel
blocking registers (TCBR1/TCBR2/TCBR3/TCBR4) control the RCHBLK and TCHBLK pins,
respectively. (The RCHBLK and TCHBLK pins are user-programmable outputs that can be forced either
high or low during individual channels). These outputs can be used to block clocks to a USART or LAPD
controller in ISDN–PRI applications.
When the appropriate bits are set to one, the RCHBLK and TCHBLK pin will be held high during the
entire corresponding channel time. See the timing in Section 18 for an example. The TCBRs have
alternate mode of use. Via the CCR3.6 bit, the user has the option to use the TCBRs to determine on a
channel by channel basis, which signaling bits are to be inserted via the TSRs (the corresponding bit in
the TCBRs = 1) and which are to be sourced from the TSER or TSIG pins (the corresponding bit in the
TCBR = 0). See the timing in Section 18.2 for an example.
RCBR1/RCBR2/RCBR3/RCBR4: RECEIVE CHANNEL BLOCKING REGISTERS
(Address = 2B to 2E Hex)
(MSB)
CH8
CH16
CH24
CH32
(LSB)
CH1
CH7
CH15
CH23
CH31
CH6
CH14
CH22
CH30
CH5
CH13
CH21
CH29
CH4
CH12
CH20
CH28
CH3
CH11
CH19
CH27
CH2
CH10
CH18
CH26
RCBR1 (2B)
RCBR2 (2C)
RCBR3 (2D)
RCBR4 (2E)
CH9
CH17
CH25
SYMBOL
POSITION
NAME AND DESCRIPTION
Receive Channel Blocking Control Bits.
CH1 to
CH32
RCBR1.0 to
RCBR4.7
0 = force the RCHBLK pin to remain low during this channel time
1 = force the RCHBLK pin high during this channel time
TCBR1/TCBR2/TCBR3/TCBR4: TRANSMIT CHANNEL BLOCKING REGISTERS
(Address = 22 to 25 Hex)
(MSB)
CH8
CH16
CH24
CH32
(LSB)
CH1
CH7
CH15
CH23
CH31
CH6
CH14
CH22
CH30
CH5
CH13
CH21
CH29
CH4
CH12
CH20
CH28
CH3
CH11
CH19
CH27
CH2
CH10
CH18
CH26
TCBR1 (22)
TCBR2 (23)
TCBR3 (24)
TCBR4 (25)
CH9
CH17
CH25
SYMBOL
POSITION
NAME AND DESCRIPTION
Transmit Channel Blocking Control Bits.
CH1 to
CH32
TCBR1.0 to
TCBR4.7
0 = force the TCHBLK pin to remain low during this channel time
1 = force the TCHBLK pin high during this channel time
Note: If CCR3.6 = 1, then a zero in the TCBRs implies that signaling data is to be sourced from
TSER (or TSIG if CCR3.2 = 1), and a one implies that signaling data for that channel is to be
sourced from the Transmit Signaling (TS) registers. In this mode, the voice-channel numbering
scheme (CH1 to CH30) is used. See the following definition.
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
