DS1338 I
2
C RTC with 56-Byte NV RAM
OPERATION
The DS1338 operates as a slave device on the serial bus. Access is obtained by implementing a START condition
and providing a device identification code, followed by data. Subsequent registers can be accessed sequentially
until a STOP condition is executed. The device is fully accessible and data can be written and read when V
CC
is
greater than V
PF
. However, when V
CC
falls below V
PF
, the internal clock registers are blocked from any access. If
V
PF
is less than V
BAT
, the device power is switched from V
CC
to V
BAT
when V
CC
drops below V
PF
. If V
PF
is greater
than V
BAT
, the device power is switched from V
CC
to V
BAT
when V
CC
drops below V
BAT
. The oscillator and
timekeeping functions are maintained from the V
BAT
source until V
CC
is returned to nominal levels. The block
diagram (Figure 3) shows the main elements of the DS1338.
An enable bit in the seconds register controls the oscillator. Oscillator startup times are highly dependent upon
crystal characteristics, PC board leakage, and layout. High ESR and excessive capacitive loads are the major
contributors to long start-up times. A circuit using a crystal with the recommended characteristics and proper layout
usually starts within 1 second.
POWER CONTROL
The power-control function is provided by a precise, temperature-compensated voltage reference and a
comparator circuit that monitors the V
CC
level. The device is fully accessible and data can be written and read when
V
CC
is greater than V
PF
. However, when V
CC
falls below V
PF
, the internal clock registers are blocked from any
access. If V
PF
is less than V
BAT
, the device power is switched from V
CC
to V
BAT
when V
CC
drops below V
PF
. If V
PF
is
greater than V
BAT
, the device power is switched from V
CC
to V
BAT
when V
CC
drops below V
BAT
. The registers are
maintained from the V
BAT
source until V
CC
is returned to nominal levels (Table 1). After V
CC
returns above V
PF
, read
and write access is allowed after t
REC
On the first application of power to the device the time and date
registers are reset to 01/01/00 01 00:00:00 (DD/MM/YY DOW HH:MM:SS). The CH bit in the seconds register will be set
to a 0.
Table 1. Power Control
SUPPLY
CONDITION
V
CC
< V
PF
, V
CC
< V
BAT
V
CC
< V
PF
, V
CC
> V
BAT
V
CC
> V
PF
, V
CC
< V
BAT
V
CC
> V
PF
, V
CC
> V
BAT
READ/WRITE
ACCESS
No
No
Yes
Yes
POWERED
BY
V
BAT
V
CC
V
CC
V
CC
OSCILLATOR CIRCUIT
The DS1338 uses an external 32.768kHz crystal. The oscillator circuit does not require any external resistors or
capacitors to operate. Table 2 specifies several crystal parameters for the external crystal. Figure 3 shows a
functional schematic of the oscillator circuit. The startup time is usually less than 1 second when using a crystal
with the specified characteristics.
Table 2. Crystal Specifications
*
PARAMETER
Nominal Frequency
Series Resistance
Load Capacitance
SYMBOL
f
O
ESR
C
L
12.5
MIN
TYP
32.768
50
MAX
UNITS
kHz
kΩ
pF
*The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to
Application Note 58: Crystal Considerations for Dallas Real-Time Clocks
for additional specifications.
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