DS1307 64 x 8, Serial, I
2
C Real-Time Clock
The DS1307 may operate in the following two modes:
1.
Slave Receiver Mode (Write Mode):
Serial data and clock are received through SDA and
SCL. After each byte is received an acknowledge bit is transmitted. START and STOP
conditions are recognized as the beginning and end of a serial transfer. Hardware performs
address recognition after reception of the slave address and direction bit (see Figure 4). The
slave address byte is the first byte received after the master generates the START condition.
The slave address byte contains the 7-bit DS1307 address, which is 1101000, followed by the
direction bit (R/W), which for a write is 0. After receiving and decoding the slave address
byte, the DS1307 outputs an acknowledge on SDA. After the DS1307 acknowledges the slave
address + write bit, the master transmits a word address to the DS1307. This sets the register
pointer on the DS1307, with the DS1307 acknowledging the transfer. The master can then
transmit zero or more bytes of data with the DS1307 acknowledging each byte received. The
register pointer automatically increments after each data byte are written. The master will
generate a STOP condition to terminate the data write.
2.
Slave Transmitter Mode (Read Mode):
The first byte is received and handled as in the slave
receiver mode. However, in this mode, the direction bit will indicate that the transfer direction
is reversed. The DS1307 transmits serial data on SDA while the serial clock is input on SCL.
START and STOP conditions are recognized as the beginning and end of a serial transfer (see
generated by the master. The slave address byte contains the 7-bit DS1307 address, which is
1101000, followed by the direction bit (R/W), which is 1 for a read. After receiving and
decoding the slave address the DS1307 outputs an acknowledge on SDA. The DS1307 then
begins to transmit data starting with the register address pointed to by the register pointer. If
the register pointer is not written to before the initiation of a read mode the first address that is
read is the last one stored in the register pointer. The register pointer automatically increments
after each byte are read. The DS1307 must receive a Not Acknowledge to end a read.
Figure 4. Data Write—Slave Receiver Mode
<Slave Address>
<RW>
<Word Address (n)>
<Data(n)>
<Data(n+1)>
<Data(n+X)>
S
1101000
0
A XXXXXXXX
A XXXXXXXX
A XXXXXXXX
A ... XXXXXXXX
A P
S - Start
A - Acknowledge (ACK)
P - Stop
Master to slave
Slave to master
DATA TRANSFERRED
(X+1 BYTES + ACKNOWLEDGE)
Figure 5. Data Read—Slave Transmitter Mode
<RW>
<Slave Address>
<Data(n)>
<Data(n+1)>
<Data(n+2)>
<Data(n+X)>
S
1101000
1
A XXXXXXXX
A XXXXXXXX
A XXXXXXXX
A ... XXXXXXXX
A P
S - Start
A - Acknowledge (ACK)
P - Stop
A
- Not Acknowledge (NACK)
Master to slave
Slave to master
DATA TRANSFERRED
(X+1 BYTES + ACKNOWLEDGE); NOTE: LAST DATA BYTE IS
FOLLOWED BY A NOT ACKNOWLEDGE (A) SIGNAL)
12 of 15
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
