Real-Time Clock
Pin Configurations
TOP VIEW
MOT
X1
1
2
3
4
5
6
7
8
9
24
V
MOT
N.C.
N.C.
AD0
AD1
AD2
AD3
AD4
AD5
1
2
3
4
5
6
7
8
9
24 V
CC
CC
23 SQW
22 N.C.
21 RCLR
23 SQW
22 N.C.
X2
N.C.
21
AD0
AD1
AD2
AD3
AD4
AD5
(RCLR)
20
V
BAT
20 N.C.
19 IRQ
18 RESET
17 DS
DS12885
DS12885S
DS12887
DS12887A
DS12C887
DS12C887A
19 IRQ
18 RESET
17 DS
16 GND
15 R/W
14 AS
16 N.C.
15 R/W
14 AS
AD6 10
AD7 11
GND 12
AD6 10
AD7 11
GND 12
13 CS
13 CS
SO, PDIP
EDIP
( ) FOR THE DS12887A/DS12C887A.
N.C.
26
18 N.C.
AS
SQW 27
17
16
15
CS
V
CC
28
1
GND
N.C.
DS12885Q
2
3
4
14
13
AD7
N.C.
MOT
X1
X2
12 AD6
PLCC
NOTE: THE DS12887A AND DS12C887A CANNOT BE STORED OR SHIPPED IN CONDUCTIVE MATERIAL
THAT WILL GIVE A CONTINUITY PATH BETWEEN THE RAM CLEAR PIN AND GROUND.
5/DS12C87A
20
____________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
