Real-Time Clock
Pin Description (continued)
PIN
SO,
PDIP
NAME
FUNCTION
EDIP
PLCC
TQFP
Active-Low Interrupt Request Output. The IRQ pin is an active-low output of the
device that can be used as an interrupt input to a processor. The IRQ output
remains low as long as the status bit causing the interrupt is present and the
corresponding interrupt-enable bit is set. The processor program normally
reads the C register to clear the IRQ pin. The RESET pin also clears pending
interrupts. When no interrupt conditions are present, the IRQ level is in the high-
impedance state. Multiple interrupting devices can be connected to an IRQ
bus, provided that they are all open drain. The IRQ pin is an open-drain output
19
19
23
21
IRQ
and requires an external pullup resistor to V
.
CC
Connection for a Primary Battery. (DS12885 Only.) Battery voltage must be held
between the minimum and maximum limits for proper operation. If a backup
supply is not supplied, V
must be grounded. Connect the battery directly to
BAT
20
21
—
24
25
22
24
V
BAT
the V
pin. Diodes in series between the V
pin and the battery may
BAT
BAT
prevent proper operation. UL recognized to ensure against reverse charging
when used with a lithium battery.
Active-Low RAM Clear. The RCLR pin is used to clear (set to logic 1) all the
general-purpose RAM, but does not affect the RAM associated with the RTC. To
clear the RAM, RCLR must be forced to an input logic 0 during battery-backup
21
RCLR
(DS12887A/
DS12C887A)
mode when V
is not applied. The RCLR function is designed to be used
CC
through a human interface (shorting to ground manually or by a switch) and not
to be driven with external buffers. This pin is internally pulled up. Do not use an
external pullup resistor on this pin.
Square-Wave Output. The SQW pin can output a signal from one of 13 taps
provided by the 15 internal divider stages of the RTC. The frequency of the
23
24
23
24
27
28
26
28
SQW SQW pin can be changed by programming Register A, as shown in Table 1.
The SQW signal can be turned on and off using the SQWE bit in Register B. The
SQW signal is not available when V is less than V
.
PF
CC
DC Power Pin for Primary Power Supply. When V
is applied within normal
CC
limits, the device is fully accessible and data can be written and read. When
is below V reads and writes are inhibited.
V
CC
V
CC
PF
5/DS12C87A
10
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