78M6610+LMU Data Sheet
Serial Interfaces
All user registers are contained in a 256-word (24-bits each) area of the on-chip RAM and can be
accessed through the UART, SPI, or I2C interfaces. While access to a single byte is possible with some
interfaces, it is highly recommended that the user access words (or multiple words) of data with each
transaction.
Only one interface can be active at a time. The interface selection pins are sampled at the end of a reset
sequence to determine the operating mode. The user should allow 10ms from a power-up or reset event
to provide the firmware adequate time to sample the state of these pins. During this time the status of
these pins must not change.
Interface Mode
IFC0
IFC1
SPI
0
1
1
X (don’t care)
UART
I2C
0
1
UART Interface
The device implements a simple serial interface (SSI) protocol on the UART interface that features:
•
•
•
•
Support for single and multipoint communications
Transmit (direction) control for an RS-485 transceiver
Efficient use of a low bandwidth serial interface
Data integrity checking
The default configuration is 38400 baud, 8-bit, no-parity, 1 stop-bit, no flow control. The value in the
BAUD register determines the baud rate to be used. Example: To select a 9600 baud rate, the user writes
a decimal 9600 to the BAUD register. The new rate will not take effect immediately. It must be saved to
flash and will take effect at the next reset. The maximum BAUD value is 115200.
RS-485 Support
The SSB/DIR/SCL pin is used to drive an RS-485 transceiver output enable or direction pin. The
implemented protocol supports a full-duplex 4-wire RS-485 bus.
A
ROUT
SDI/RX/SDAi
SSB/DIR/SCL
RS-485 BUS
B
REN
DEN
4.7K
A
B
78M6610+LMU
DIN
RS-485 BUS
SDO/TX/SDAo
Figure 27. RS-485 Interface
49
Rev 0
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
