MCP7952X/MCP7951X
2.8
RTCC Memory Map
The RTCC registers are contained in addresses 0x00h-
0x1fh. 64 bytes of user-accessable SRAM are located
in the address range 0x20-0x5f. The SRAM memory is
a separate block from the RTCC control and Configura-
tion registers. All SRAM locations are battery-backed-
up during a V
CC
power fail. Unused locations are not
accessible.
• Addresses 0x00h-0x07h are the RTCC Time and
Date registers. These are read/write registers.
Care must be taken when writing to these regis-
ters with the oscillator running.
• Incorrect data can appear in the Time and Date
registers if a write is attempted during the time
frame where these internal registers are being
incremented. The user can minimize the
likelihood of data corruption by ensuring that any
writes to the Time and Date registers occur before
the contents of the second register reach a value
of 0x59H.
• Addresses 0x08h-0x0Bh are the device Configu-
ration and Calibration registers.
• Addresses 0x0ch-0x11h are the Alarm 0 registers.
These are used to set up the Alarm 0, the inter-
rupt pin and the Alarm 0 compare.
• Addresses 0x12h-0x17h are the Alarm 1 regis-
ters. These are used to set up the Alarm 1, the
interrupt pin and the Alarm 1 compare, Alarm 1
offers a enhanced resolution of tenth and
hundredths of seconds.
• Addresses 0x18h-0x1Fh are used for the power-
down and power-up time-stamp feature. The
detailed memory map is shown in
No
error checking is provided when loading Time and
Date registers.
FIGURE 2-2:
MEMORY MAP
RTCC Register/SRAM
EEPROM
0x00
Time and Date
0x00
0x07
0x09
0x0B
0x0C
0x11
0x12
Alarm 1
0x17
0x18
0x1F
0x20
Time-Stamp
Configuration and Calibration
Alarm 0
EEPROM
Memory
0xFF
Note:
1K EEPROM Max address is 0x7F.
Unique ID
0x00
0x07
0x08
0x5F
0x0F
SRAM (64 Bytes)
Unique ID Location 1
EUI-48/64
Unique ID Location 2
2012 Microchip Technology Inc.
Preliminary
DS22300A-page 7
MAS [ MICRO ANALOG SYSTEMS ]
