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MAS9191A 参数 Datasheet PDF下载

MAS9191A图片预览
型号: MAS9191A
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片AMPS / ETACS / NAMPS音频/数据处理器 [Single Chip AMPS/ETACS/NAMPS Audio/Data Processor]
分类和应用:
文件页数/大小: 36 页 / 438 K
品牌: MAS [ MICRO ANALOG SYSTEMS ]
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DA9191A.000  
July 31, 1997  
FUNCTIONS  
Data Transmission  
After a reset the TX block is in power down. The  
power down mode is controlled by bit TXSIP (TX  
section in power down) in register 07HEX. The TXRST  
When the block comes out of power down mode the  
XINT is active because the device is ready to receive  
data (TXWRD goes high). The lower nibble of the  
fifth byte is ignored. The 36 bits of data are coded by  
the BCH coder with following polynomial:  
bit located in register 12  
is used every time a TX  
HEX  
collision occurs or for any other TX block reset  
causes. When the device is ready to receive data,  
the TXWRD bit of register 10HEX is high. If five bytes  
are written into register 19HEX the data transmission  
begins. The data is transferred from the serial  
interface to the TX buffer and the TXWRD bit is set  
high again, which causes XINT to become active.  
G(x) = x12 + x10 + x8 + x5 + x4 + x3 + x0  
The BCH coder adds 12 parity bits to the data and  
the data is transferred to the DCC coding block. The  
DCC coder adds a digital color code on the reverse  
control channel (RECC) according following table.  
DCC(1:0)  
Coded DCC  
0000000  
0011111  
1100011  
1111100  
00  
01  
10  
11  
The framing block adds bit sync (101010...10) and word sync (11100010010) sequences to the frames and  
performs needed repeats depending on the mode.  
Reverse control channel data format. The numbers under the frames show the number of bits in each section.  
Bit sync  
Word sync  
Coded DCC  
First word  
Second word  
repeated 5 times repeated 5 times  
30  
11  
7
240  
240  
Reverse voice channel data format.  
1.Repeat  
2.Repeat  
of word 1  
Bit Sync  
Word  
Sync  
11  
Bit Sync  
Word  
Bit Sync  
Word  
Sync  
11  
Word  
Sync  
11  
of word 1  
48  
Sync  
11  
101  
37  
Bit Sync  
48  
37  
Bit Sync  
5.Repeat  
1.Repeat  
Bit Sync  
Word  
Sync  
11  
Word  
Sync  
11  
Word  
Sync  
11  
of word 1  
of word 2  
37  
Bit Sync  
48  
37  
48  
37  
5.Repeat  
of word 2  
37  
48  
The Manchester encoder block encodes the data into  
a Manchester coded format with bit clock. The bit  
clock is 8kHz in the ETACS mode and 10kHz in the  
AMPS mode. The mode can be controlled by bit  
SYS0 of register 12HEX. The data polarity can be  
inverted with bit INVTX of register 13HEX.If the BUSY  
bit does not go active between 56 and 104 bits of the  
transmitted message a transmission collision occurs.  
In this case the data which is in the TX block and the  
data that the user is writing to the device will not be  
transmitted. The TXCOL bit of register 10HEX will go  
high in this case and cause an interrupt. The TXCOL  
will remain active until the TX block is reset with the  
TXRST bit of register 12HEX. If the TXCTREN bit is  
active in register 12HEX the TXCTRL output turns the  
transmitter off when a TX collision occurs. If the  
AUMUT bit in register 13HEX is set to high the TX  
audio block is muted with switch S19 on the voice  
channel while data transmission is occurring.  
13