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MAS6503CA1WAD00 参数 Datasheet PDF下载

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型号: MAS6503CA1WAD00
PDF下载: 下载PDF文件 查看货源
内容描述: [Piezoresistive Sensor Signal Interface IC]
分类和应用:
文件页数/大小: 34 页 / 1936 K
品牌: MAS [ MICRO ANALOG SYSTEMS ]
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DA6503.005  
14 December 2016  
ELECTRICAL CHARACTERISTICS  
TA = -40oC to +85oC, VDD = 2.7V, Typ TA = 27oC, Typ VDD = 2.7 V, RSENSOR = 4.5kunless otherwise noted  
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max  
Unit  
Internal Oscillator  
Frequency  
OSC  
460  
500  
540  
kHz  
Internal System  
Clock Frequency  
MCLK  
IAVG_P  
Normal clock (DIV=0, ENDIV=0)  
DIV=0, ENDIV=1  
DIV=1, ENDIV=0  
DIV=1, ENDIV=1  
1 conversion/s, Reg ON (VREG =1.8V)  
Normal clock (DIV=0, ENDIV=0)  
TA = 27oC  
230  
115  
57.5  
28.7  
250  
125  
62.5  
31.25  
270  
135  
67.5  
33.8  
kHz  
µA  
Average ADC  
Current in Pressure  
Measurement  
(incl. sensor current)  
OSR=4096  
OSR=2048  
OSR=1024  
OSR=512  
17.8  
9.1  
4.8  
2.6  
1.5  
25.2  
12.9  
6.7  
3.7  
2.1  
OSR=256  
Average ADC  
Current in  
Temperature  
Measurement  
(incl. sensor current  
IAVG_T  
1 conversion/s, Reg ON (VREG =1.8V)  
Normal clock (DIV=0, ENDIV=0)  
TA = 27oC  
µA  
µA  
OSR=4096  
OSR=2048  
11.1  
6.8  
3.4  
1.8  
0.9  
17.8  
10.4  
5.3  
2.7  
1.4  
OSR=1024  
OSR=512  
OSR=256  
Average ADC  
Current in VDD  
Level Monitoring  
Measurement  
IAVG_VDD  
1 conversion/s, Reg OFF  
Normal clock (DIV=0, ENDIV=0)  
TA = 27oC  
OSR=4096  
OSR=2048  
OSR=1024  
OSR=512  
12.7  
6.5  
3.4  
1.9  
1.1  
20.1  
10.3  
5.4  
2.9  
1.7  
OSR=256  
Conversion Time  
tCONV  
Normal clock (DIV=0, ENDIV=0)  
TA = 27oC  
ms  
ms  
OSR=4096  
OSR=2048  
OSR=1024  
OSR=512  
OSR=256  
Note 1.  
16.77  
8.58  
4.48  
2.43  
1.41  
18.23  
9.32  
4.87  
2.64  
1.53  
1
VDD Rise Time for  
Proper Power On  
Reset (POR)  
tVDD_RISE  
Note 1. It is also recommended to reset the device manually either by XCLR pin or using reset register after every power up (VDD rise). In  
case the VDD rise time is longer than specified here the device has to be kept in a reset during power up by the XCLR pin (XCLR=low).  
Violating this may risk EEPROM memory integrity. See APPLICATION INFORMATION for examples of external POR circuits.  
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