DA6116.001
27 February, 2009
Data byte bits:
• All registers are set to their default values 00HEX except CR3 which is set to FFHEX during power-on reset.
• Default value for all bits is zero (00HEX).
TEST REGISTER CR5 DESCRIPTION
Note: Test register is intended for internal testing of the device only and not supposed to be used in
normal operation. It is strongly recommended not to change initial test register value from the default
(00HEX).
The XMUTE pin is in output mode when bit 1 in the test register CR5 is set. Bits 2, 3 and 4 select the internal
signal to be routed to the XMUTE pin in the test mode.
Condition
Data Byte bits
Function
7
0
0
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
1
1
1
1
3
0
0
0
0
1
1
0
0
1
1
2
0
0
0
1
0
1
0
1
0
1
1
0
0
1
1
1
1
1
1
1
1
0
0
1
0
0
0
0
0
0
0
0
XMUTE=in
Normal operation
Force latch, note 2
Left delay generator
Left peak detector
Left zero crossing
Left gain set enable
Right delay generator
Right peak detector
Right zero crossing
Right gain set enable
Test, XMUTE=in
Test, XMUTE=out
Test, XMUTE=out
Test, XMUTE=out
Test, XMUTE=out
Test, XMUTE=out
Test, XMUTE=out
Test, XMUTE=out
Test, XMUTE=out
Note 2. Forces the new gain value to be set without waiting for a zero crossing to occur in the input signal or the timeout delay to pass. When
force latch is used, both channels are latched with the same gain value.
POWER-ON RESET
MAS6116 has a Power-On Reset circuit (POR) that ensures that the circuit is set to a known state when power is
applied. The device can be activated as described in chapter Operating modes after the POR delay has passed.
In addition MAS6116 has a supply voltage monitoring circuit, that monitors the digital supply voltage (DVCC) level.
If the digital supply voltage drops below the specified level, the circuit is set to RESET state. The voltage
monitoring circuit is functional only when sufficient analog supply voltage (AVCC) is present.
Parameter
Symbol
TPOR
Conditions
Min
Typ
450
2.8
Max
Unit
POR delay
From DVCC=5V to POR rising edge
Measured from DGND
µs
Monitored DVCC
level
Vmon
V
AVCC level to
enable DVCC
monitoring
VAVCC
Measured from AGND
2.5
V
8 (18)
MAS [ MICRO ANALOG SYSTEMS ]
