DA6180C.000
26 November, 2010
PIN CONFIGURATION & TOP MARKING FOR PLASTIC TSSOP-16 PACKAGE
VDD
QOP
QOM
VSS
RFIM
6180zz
RFIP
PDN
AON
DEC
YYWW
QI
AGC
OUT
Top Marking Definitions:
zz = Version
YYWW = Year Week
PIN DESCRIPTION
Pin Name
VDD
QOP
QOM
QI
AGC
OUT
DEC
AON
PDN
RFIP
RFIM
VSS
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Type
P
AO
AO
NC
AI
AO
NC
DO
AO
DI
DI
NC
AI
NC
AI
G
Function
Positive Power Supply
Positive Quartz Filter Output
Negative Quartz Filter Output
Quartz Filter Input for Crystal
AGC Capacitor
Receiver Output
Demodulator Capacitor
AGC On Control
Power Down Input
Positive Receiver Input
Negative Receiver Input
Power Supply Ground
3
4
5
6
6
Note
1
2
A = Analog, D = Digital, P = Power, G = Ground, I = Input, O = Output, NC = Not Connected
Notes:
1) QOM pin is electrically unconnected in MAS6180C1 version
2) Pin 4 between QOM and QI must be connected to VSS to eliminate TSSOP package lead frame parasitic
capacitances disturbing the crystal filter performance. All other NC (Not Connected) type pins are also
recommended to be connected to VSS to minimize noise coupling.
3) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated)
-
the output is a current source/sink with |I
OUT
| > 5
µA
-
at power down the output is pulled to VSS (pull down switch)
4) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)
-
Internal pull-up with current < 1
µA
which is switched off at power down
5) PDN = VSS means receiver on; PDN = VDD means receiver off
-
Fast start-up is triggered when the receiver is after power down (PDN=VDD) controlled to power up
(PDN=VSS) i.e. at the falling edge of PDN signal.
6) Receiver inputs RFIP and RFIM have both 1.4 MΩ biasing resistors towards VDD
9 (13)
MAS [ MICRO ANALOG SYSTEMS ]
