DA6180B.002
5 May, 2011
TYPICAL APPLICATION (Continued)
Note 2: AGC Capacitor
The AGC and DEC capacitors must have low leakage currents due to very small signal currents through the
capacitors. The insulation resistance of these capacitors should be at minimum 100 MΩ. Also probes with at
least few 100 MΩ impedance should be used for voltage probing of the AGC and DEC pins. Electrolytic AGC
capacitor should have voltage rating at least 25 V for low enough leakage. DEC capacitor can be low leakage
chip capacitor.
It is recommended to connect both AGC and DEC capacitors to VDD (see application figures 1, 2 and 3)
although VSS connection is also possible. The VDD connection provides better supply noise immunity because
signals are referenced to VDD. Additionally leakage currents are minimized in this connection because in power
down the AGC pin voltage is pulled to VDD (to minimum AGC gain) then corresponding to zero voltage over the
AGC capacitor.
Note 3: Power Down / Fast Startup Control
Both power down and fast startup are controlled using the PDN pin. The device is in power down (turned off) if
PDN = VDD and in power up (turned on) if PDN = VSS. Fast startup is triggered automatically by the falling edge
of PDN signal, i.e., controlling device from power down to power up. The VDD must be high before falling edge of
PDN to guarantee proper operation of fast startup circuitry. Before power up the device should have been kept in
power down state at least 50ms. This guarantees that the AGC capacitor voltage has been completely pulled to
VDD during power down. The startup time without proper fast startup control can be over minute but with fast
startup it is shortened typically to a few seconds.
Note 4: Optional Control for AGC On/Hold
AON control pin has internal pull up which turns AGC circuit on all the time if AON pin is left unconnected.
Optionally AON control can be used to hold and release AGC circuit. Stepper motor drive of analog clock or
watch can produce disturbing amount of noise which can shift the input amplifier gain to unoptimal level. This can
be avoided by controlling AGC hold (AON=VSS) during stepper motor drive periods and releasing AGC
(AON=VDD) when motors are not driven. The AGC should be in hold only during disturbances and kept on other
time released since due to leakage the AGC voltage can change slowly even when in hold.
Note 5: Ferrite Antenna
The ferrite antenna converts the transmitted radio wave into a voltage signal. It has an important role in
determining receiver performance. Recommended antenna impedance at resonance is around 100 kΩ.
Low antenna impedance corresponds to low noise but often also to small signal amplitude. On the other hand
high antenna impedance corresponds to high noise but also large signal. The optimum performance where
signal-to-noise ratio is at maximum is achieved in between.
The antenna should have also some selectivity for rejecting near signal band disturbances. This is determined by
the antenna quality factor which should be approximately 100. Much higher quality factor antennas suffer from
extensive tuning accuracy requirements and possible tuning drifts by the temperature.
Antenna impedance R
ant
can be calculated using equation 1 where f
res
, L, Q
ant
and C are resonance frequency,
coil inductance, antenna quality factor and antenna tuning capacitor respectively. Antenna quality factor Q
ant
is
defined by ratio of resonance frequency f
res
and antenna bandwidth B (equation 2).
R
ant
=
2
π
⋅
f
res
⋅
L
⋅
Q
ant
=
Q
ant
=
f
res
B
Q
ant
1
=
2
π
⋅
f
res
⋅
C
2
π
⋅
B
⋅
C
Equation 1.
Equation 2.
Table 4 on next page presents some antenna suppliers for time signal application.
7 (14)
MAS [ MICRO ANALOG SYSTEMS ]
