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MV78100-A0-BHO1C100 参数 Datasheet PDF下载

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型号: MV78100-A0-BHO1C100
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内容描述: 发现™系列的创新CPU系列硬件规格 [Discovery™ Innovation Series CPU Family Hardware Specifications]
分类和应用:
文件页数/大小: 124 页 / 1524 K
品牌: MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
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Electrical Specifications  
9.6.6.2  
SDRAM DDR2 400 MHz Clock Specifications  
Table 38: SDRAM DDR2 400 MHz Clock Specifications  
Description  
Clock period jitter  
Symbol  
tJIT(per)  
Min  
-100  
-80  
Max  
100  
80  
Units  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
Notes  
1
2
3
4
5
5
5
5
5
5
6
7
8
9
Clock perior jitter during DLL locking period  
Cycle to cycle clock period jitter  
tJIT(per,lck)  
tJIT(cc)  
-200  
-160  
-150  
-175  
-200  
-200  
-300  
-450  
-100  
200  
160  
150  
175  
200  
200  
300  
450  
100  
Cycle to cycle clock period jitter during DLL locking period  
Cumulative error across 2 cycles  
Cumulative error across 3 cycles  
Cumulative error across 4 cycles  
Cumulative error across 5 cycles  
Cumulative error across n cycles, n=6...10, inclusive  
Cumulative error across n cycles, n=11…50, inclusive  
Duty cycle jitter  
tJIT(cc,lck)  
tERR(2per)  
tERR(3per)  
tERR(4per)  
tERR(5per)  
tERR(6-10per)  
tERR(11-50per)  
tJIT(duty)  
Absolute clock period  
tCK(abs)  
See note 7  
Absolute clock high pulse w idth  
tCH(abs)  
See note 8  
See note 9  
Absolute clock low pulse w idth  
tCL(abs)  
Notes :  
General comment: All timing values are defined on CLK / CLKn crossing point, unless otherw ise specified.  
1. tJIT(per) is defined as the largest deviation of any single tCK from tCK(avg).  
tJIT(per) = Min/max of {tCKi- tCK(avg) w here i=1 to 200}.  
tJIT(per) defines the single period jitter w hen the DLL is already locked.  
2. tJIT(per,lck) uses the same definition for single period jitter, during the DLL locking period only.  
3. tJIT(cc) is defined as the difference in clock period betw een tw o consecutive clock cycles: tJIT(cc) = Max of |tCKi+1 – tCKi|.  
tJIT(cc) defines the cycle to cycle jitter w hen the DLL is already locked.  
4. tJIT(cc,lck) uses the same definition for cycle to cycle jitter, during the DLL locking period only.  
5. tERR(nper) is defined as the cumulative error across multiple consecutive cycles fromtCK(avg).  
Refer to JEDEC Standard No. 79-2 (DDR2 SDRAM Specification) for more information.  
6. tJIT(duty) is defined as the cumulative set of tCH jitter and tCL jitter. tCH jitter is the largest deviation of  
any single tCH from tCH(avg). tCL jitter is the largest deviation of any single tCL from tCL(avg).  
tJIT(duty) = Min/max of {tJIT(CH), tJIT(CL)} w here,  
tJIT(CH) = {tCHi- tCH(avg) w here i=1 to 200}; tJIT(CL) = {tCLi- tCL(avg) w here i=1 to 200}.  
7. tCK(abs),min = tCK(avg),min + tJIT(per),min; tCK(abs),max = tCK(avg),max + tJIT(per),max.  
8. tCH(abs),min = tCH(avg),min x tCK(avg),min + tJIT(duty),min; tCH(abs),max = tCH(avg),max x tCK(avg),max + tJIT(duty),max.  
9. tCL(abs),min = tCL(avg),min x tCK(avg),min + tJIT(duty),min; tCL(abs),max = tCL(avg),max x tCK(avg),max + tJIT(duty),max.  
Copyright © 2008 Marvell  
MV-S104552-U0 Rev. D  
Page 83  
December 6, 2008, Preliminary  
Document Classification: Proprietary Information  
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