MV78100
Hardware Specifications
9.7
Differential Interface Electrical Characteristics
This section provides the reference clock, AC, and DC characteristics for the following differential
interfaces:
PCI Express (PCIe) Interface Electrical Characteristics
SATA Interface Electrical Characteristics
USB Interface Electrical Characteristics
9.7.1
Differential Interface Reference Clock Characteristics
9.7.1.1
PCI Express Interface Differential Reference Clock Characteristics
Table 52
The reference clock characteristics in Table 52 is relevant for the PEX0_CLK_P,
PEX0_CLK_N, PEX1_CLK_P, PEX1_CLK_N pins.
Note
Table 51: PCI Express Interface Differential Reference Clock Characteristics
Description
Symbol
fCK
Min
Max
Units
MHz
tCK
V/nS
mV
Notes
Clock frequency
Clock duty cycle
100.0
-
-
DCrefclk
SRrefclk
VIHrefclk
VILrefclk
Vcross
Vcrs_dlta
Tperavg
Tperabs
Tccjit
0.4
0.6
0.6
4.0
Differential rising/falling slew rate
Differential high voltage
3
-
150.0
-
-
Differential low voltage
-150.0
550.0
140.0
2800.0
10.2
mV
-
Absolute crossing point voltage
Variation of Vcross over all rising clock edges
Average differential clock period accuracy
Absolute differential clock period
Differential clock cycle-to-cycle jitter
Notes :
250.0
-
mV
1
1
-
mV
-300.0
9.8
ppm
nS
2
-
-
150.0
pS
General Comment: The reference clock timings are based on 100 ohm test circuit.
General Comment: Refer to the PCI Express Card Electromechanical Specification, Revision 1.1,
March 2005, section 2.1.3 for more information.
1. Defined on a single-ended signal.
2. Including jitter and spread spectrum.
3. Defined from -150 mV to +150 mV on the differential w aveform.
MV-S104552-U0 Rev. D
Copyright © 2008 Marvell
Page 104
Document Classification: Proprietary Information
December 6, 2008, Preliminary
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
