88EM8040/88EM8041
Datasheet
Figure 19: Input Voltage Resistor Divider Layout Guidelines
Ra
OCP
SW
ISNS
VIN
PGND
SGND
88EM8040/
8041
Rb
Rc
Cc
VDD
FB
Keep layout of Rb, Rc and Cc as
close as possible to Vin pin to
keep high noise immunization
5.2
Isolated Voltage Loop and Output Voltage Feedback
on FB Pin
The88EM8040/88EM8041 IC integrates the voltage loop into digital DSP core. This internal voltage
loop has the lower corner frequency for the PFC requirement. The FB pin is the internal voltage loop
feedback signal input. The voltage reference of the IC is 2.5V for the rated output voltage.
The Flyback PFC is an isolated power system, which needs the opto-coupler device transferring the
output voltage amplitude signal to the FB pin. Since the CTR (Current Transfer Ratio) parameter of
this opto-coupler has a big tolerance and shifts with the temperature, an additional voltage reference
and compensation is required at the secondary side. This secondary voltage loop circuit can use a
low voltage adjustable shunt regulator such as the TLV431 or a dual op-amp with a reference
voltage such as the TSM1014 to constitute the error amplifier with compensation network. Figure 20
shows the typical voltage feedback loop circuit.
Figure 20: Secondary Compensation Network with Opt-coupler
VOut
RS4
VFB
VDD
CS2
CS1
RS5
RS2
1
2
Verr
Vref
Rf1
RS3
Doc. No. MV-S104983-01 Rev. A
Page 30
Copyright © 2009 Marvell
Document Classification: Proprietary
October 5, 2009, Preliminary
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
