List of Tables
Table 1: Network 10/100/1000 PHY Interface (Ports 0 to 4) ........................................................................... 15
Table 2: Port Status LEDs (Ports 0 to 4)......................................................................................................... 16
Table 3: SERDES/1000BASE-X/SGMII Interface (Port 4 and Port 5)............................................................. 17
Table 4: GMII/MII Interface Enable (Port 4) .................................................................................................... 18
Table 5: GMII/MII Receive Interface (Port 4)................................................................................................... 19
Table 6: GMII/MII Transmit Interface (Port 4).................................................................................................. 20
Table 7: GMII/RGMII/MII Interface Enable (Port 5) ......................................................................................... 24
Table 8: GMII/RGMII/MII Receive Interface (Port 5) ....................................................................................... 25
Table 9: GMII/RGMII/MII Transmit Interface (Port 5) ...................................................................................... 27
Table 10: Regulators and Reference ................................................................................................................ 30
Table 11: System .............................................................................................................................................. 30
Table 12: Register Access Interface ................................................................................................................. 31
Table 13: Serial EEPROM Interface.................................................................................................................. 33
Table 14: Switch Configuration Interface .......................................................................................................... 35
Table 15: Power & Ground................................................................................................................................ 36
Table 16: No Connect ....................................................................................................................................... 39
Table 18: 88E6165 Device Interfaces ............................................................................................................... 49
Table 19: 88E6165 Bypass Modes ................................................................................................................... 51
Table 20: Absolute Maximum Ratings.............................................................................................................. 59
Table 21: Recommended Operating Conditions ............................................................................................... 60
Table 22: Current Consumption ........................................................................................................................ 62
Table 23: Digital Operating Conditions.............................................................................................................. 65
Table 24: Programming SGMII Output Amplitude............................................................................................. 66
Table 25: IEEE DC Transceiver Parameters..................................................................................................... 71
Table 26: Reset and Configuration Timing........................................................................................................ 72
Table 27: Clock Timing...................................................................................................................................... 73
Table 28: GMII Transmit Timing........................................................................................................................ 74
Table 29: GMII Receive Timing......................................................................................................................... 75
Table 30: RGMII Interface Timing ..................................................................................................................... 76
Table 31: Transmit - GTXCLK (TXC) Timing when RGMII Transmit Delay Control (bit 3) = 0 ......................... 77
Table 32: Transmit - GTXCLK (TXC) Timing when RGMII Transmit Delay Control (bit 3) = 1 ........................ 77
Table 33: Receive - INCLK (RXC) Timing when RGMII Receive Delay Control (bit 4) = 0............................... 78
Table 34: Receive - INCLK (RXC) Timing when RGMII Receive Delay Control (bit 4) = 1............................... 78
Table 35: MII MAC Mode Clock Timing............................................................................................................. 79
Table 36: MII Receive Timing—MAC Mode 100 Mbps Operation..................................................................... 80
Table 37: MII Receive Timing—MAC Mode 200 Mbps Operation..................................................................... 80
Table 38: MII Transmit Timing—MAC Mode 100 Mbps Operation.................................................................... 81
Table 39: MII Transmit Timing—MAC Mode 200 Mbps Operation.................................................................... 82
Table 40: SMI Clock Timing (CPU Set)............................................................................................................. 83
Table 41: SMI Data Timing (CPU Set) .............................................................................................................. 84
Copyright © 2007 Marvell
Doc. No. MV-S104501-01 Rev. --
Page 9
CONFIDENTIAL
Document Classification: Proprietary Information
November 9, 2007, Advance
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
