®
Link Street 88E6165
Datasheet Part 1 of 3: Overview, Pinout, Applications, Mechanical and Electrical
Specifications
HIGHLIGHTED FEATURES
FEATURES
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Supports up to 10K Byte Jumbo frames
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Marvell® Header for increased Routing perfor-
mance
‘Best-in-Class’ per port TCP/IP Ingress Rate Lim-
iting along with independent Storm Prevention
Shared 1 Mbit on-chip memory-based switch fab-
ric with true non-blocking switching performance
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5 Ingress Rate Limiting buckets per port, support-
ing Rate-based and Priority-based rate limiting
High performance lookup engine with support for
up to 8K MAC address entries with automatic
learning and aging
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Non-Rate Limited frames based on SA or DA
Layer 2 Policy Control List (PCL) enables drop,
trap, or mirroring based on SA, DA, VID, Ether-
type, VBAS, PPPoE, UDP, and DHCP Option 82
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Supports the Marvell Distributed Switching Archi-
tecture (DSA) for STP, up to 32 cascaded
devices, and CPU-directed packet processing
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Remote Management capabilities allow device
configuration and readback via Ethernet frames
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MAC SA based 802.1X authentication
Port Trunking and Port Monitoring/Mirroring
across chips
Per port, programmable MAC hardware address
learn limiting
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Egress tagging/untagging selectable per port or
by 802.1Q VLAN ID
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Quality of Service support with four traffic classes
QoS determined by Port, IEEE 802.1p tagged
frames, IPv4’s Type of Service (TOS) & Differenti-
ated Services (DS), IPv6’s Traffic Class 802.1Q
VID, Destination MAC address, or Source MAC
address
Port based VLANs supported in any combination
across multiple chips
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Port States & BPDU handling for Spanning Tree
28 32-bit and 2 64-bit RMON Counters per port
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Frame priority overrides based on SA, DA, or VID
Ports 4 & 5 have independent triple speed SER-
DES transceivers to interface with Marvell®
Alaska® gigabit copper PHYs and can optionally
be configured as fiber ports (100BASE-FX or
1000BASE-X) with direct connection to lasers
Queue priority overrides based on SA, DA, VID,
ARP, or Snoop
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Strict, Weighted, or mixed mode QoS selectable
per port
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Ports 4 and 5 can support GMII Mode (full-
duplex), MII-MAC Mode (Forward) or MII-PHY
Mode (Reverse—full-duplex) interface options for
management and firewall applications
Globally Programmable QoS weighting via a 128-
entry table
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802.1Q VLAN support for the full 4,096 VLAN IDs
Supports multiple provider ports within a single
chip via a programmable Ethertype per port
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Port 5 supports an additional RGMII Mode
Integrated with five independent Auto-Crossover
Gigabit Ethernet transceivers fully compliant with
the applicable sections of IEEE802.3 and
IEEE802.3u
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Enhanced 802.1s Per VLAN Spanning Tree sup-
porting up to 64 spanning tree instances
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Integrated MDI interface termination resistors
Integrated Advanced Virtual Cable Tester®
(VCT™) cable diagnostic feature
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Flexible LED support for Link, Speed, Duplex
Mode, Collision, and Tx/Rx Activities
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Supports a low-cost 25 MHz XTAL clock source
Supports 4-Wire 93C56/93C66 or 2-Wire 24C01/
24C02/24C04 EEPROMs
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Single chip integration of an 6 port GE QoS
switch and memory in a 24 x 24 mm 216-pin
LQFP package
Low power dissipation PAVE = 2.5W
Doc. No. MV-S104501-01 Rev. --
Page 6
Copyright © 2007
November 9, 2007, Advance
CONFIDENTIAL
Document Classification: Proprietary Information
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
