88E1111 Product Brief
Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver
Table 11: JTAG Interface
117-TFBGA 96-BCC 128-PQFP Pin Type
Pin
Description
Pin #
Pin #
Pin #
Name
L7
44
67
TDI
I, PU
I, PU
I, PU
I, PU
Boundary scan test data input.
TDI contains an internal 150 kohm pull-up
resistor.
L8
L9
M9
46
49
47
69
70
68
TMS
TCK
Boundary scan test mode select input.
TMS contains an internal 150 kohm pull-up
resistor.
Boundary scan test clock input.
TCK contains an internal 150 kohm pull-up
resistor.
TRSTn
Boundary scan test reset input. Active low.
TRSTn contains an internal 150 kohm pull-
up resistor as per the 1149.1 specification.
After power up, the JTAG state machine
should be reset by applying a low signal on
this pin, or by keeping TMS high and apply-
ing 5 TCK pulses, or by pulling this pin low
by a 4.7 kohm resistor.
K8
50
72
TDO
O, Z
Boundary scan test data output.
Doc. No. MV-S105540-00, Rev. --
Page 26
Copyright © 2009 Marvell
March 4, 2009, Advance
Document Classification: Proprietary Information
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
