®
LY65W64
8K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
SYMBOL TEST CONDITION
MIN.
3.0
2.0
TYP. *4 MAX.
UNIT
PARAMETER
Supply Voltage
Input High Voltage
VCC
3.3
5.5
VCC+0.5
VCC+0.5
0.6
V
V
V
V
V
VCC=3.0~3.6V
VCC=4.5~5.5V
-
-
-
-
-
*1
VIH
2.4
Input Low Voltage
V
CC=3.0~3.6V
- 0.5
- 0.5
- 1
*2
VIL
VCC=4.5~5.5V
0.8
1
Input Leakage Current
Output Leakage
Current
VCC ≧ VIN ≧ VSS
ILI
A
µ
V
CC ≧ VOUT ≧ VSS,
ILO
- 1
-
1
A
µ
Output Disabled
Output High Voltage
Output Low Voltage
VOH IOH = -4mA
VOL IOL = 8mA
2.2
-
-
-
-
V
V
0.4
Cycle time = Min.
CE# = VIL and CE2 = VIH,
I/O = 0mA,
Average Operating
Power supply Current
30
55
ICC
-
mA
I
Others at VIL or VIH
CE# = VIH or CE2 = VIL
Others at VIL or VIH
CE# ≧VCC-0.2V or CE2 0.2V
Others at 0.2V or VCC-0.2V
0.3
1
5
ISB
-
-
mA
Standby Power
Supply Current
≦
50
ISB1
A
µ
Notes:
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
℃
Typical valued are measured at VCC = VCC(TYP.) and TA = 25
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
MIN.
-
-
MAX
6
8
UNIT
pF
pF
CIN
CI/O
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0.2V to VCC - 0.2V
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
3ns
1.5V
CL = 30pF + 1TTL, IOH/IOL = -4mA/8mA
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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